Hi Bravo,
The latest Qualcomm patent I found indicates they are using a hynrid analog compute-in-memory neuron arrangement:
US2023297335A1 Hybrid Compute-in-Memory 20220315
View attachment 71695
The capacitor C is charged when both the switches S1 & S2 are closed.
US2023115373A1 ACCUMULATOR FOR DIGITAL COMPUTATION-IN-MEMORY ARCHITECTURES 20211013
a method for in-memory computation. The method generally includes: accumulating, via each digital counter of a plurality of digital counters, output signals on a respective column of multiple columns of a memory, wherein a plurality of memory cells are on each of the multiple columns, the plurality of memory cells storing multiple bits representing weights of a neural network, wherein the plurality of memory cells of each of the multiple columns correspond to different word-lines of the memory; adding, via an adder circuit, output signals of the plurality of digital counters; and accumulating, via an accumulator, output signals of the adder circuit.