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BRN Discussion Ongoing
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MDhere
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lol
i like it , I like it alot, thanks for the post Nantrix. Though the bit about would make an attractive takeover canditate by a global player can hold its horses a bit, aint no takevover in single $ digits try high double $ digits.Apologies if already posted
Is the turnaround coming for chip stocks? Intel, Nvidia, BrainChip, Aixtron and AMD
Last year, semiconductors were declared the new gold due to blown-up supply chains and the resulting shortages. After the recent boom and the build-up of overcapacity, the market could now grind to a halt by 2023 at the latest. High inflation, a global economic downturn and a possible recession...ow.ly
But i do like the bit about - It is no coincidence that the Akida chip was recently accepted into the AI Partner Program by ARM. Mercedes-Benz also relies on the novel technology for its EQXX. Nice article and good positive blog.
stuart888
Regular
Lots of smart people here, thanks for helping us newbies at the code level. I have been trying to wrap my brain around the Renesas 2-node license. Dio might have mentioned 2 nodes and 8 NPUs. Perhaps the term node is not working for me. The 8 NPUs is Neural Processing Units I assume. The nodes, layers, NPUs kind of get foggy for those of us javascript/sql programmers!
Brainchip's big advantage is tangled in the SNN architecture. I also realize that the output of Akida often is to another receiving function. Meaning we are part of a solution, in a chain to the final outcome of message to the user. Like Nasa for example, Akida after being dormmate (non-spiked! non-threshold!) for months, awakes to send a signal that an asteroid is approaching and might fire up the energy usage next step.
The more everyone talks about the architecture details the better in my opinion. Layers, nodes, activation functions, all that. Keep it coming, very helpful.
Brainchip's big advantage is tangled in the SNN architecture. I also realize that the output of Akida often is to another receiving function. Meaning we are part of a solution, in a chain to the final outcome of message to the user. Like Nasa for example, Akida after being dormmate (non-spiked! non-threshold!) for months, awakes to send a signal that an asteroid is approaching and might fire up the energy usage next step.
The more everyone talks about the architecture details the better in my opinion. Layers, nodes, activation functions, all that. Keep it coming, very helpful.
uiux
Regular
Hi Stuart if you are a coder you might appreciate the working examples I've put together using Akida:
stdp - Overview
Artificial Intelligence is a hobby. stdp has 8 repositories available. Follow their code on GitHub.
github.com
To understand layers of the network, this is an example of the edge learning enabled mobilenet model:
Model Summary
________________________________________________
Input shape Output shape Sequences Layers
================================================
[224, 224, 3] [1, 1, 10] 1 16
________________________________________________
SW/conv_0-akida_edge_layer (Software)
________________________________________________________________
Layer (type) Output shape Kernel shape
================================================================
conv_0 (InputConv.) [112, 112, 16] (3, 3, 3, 16)
________________________________________________________________
separable_1 (Sep.Conv.) [112, 112, 32] (3, 3, 16, 1)
________________________________________________________________
(1, 1, 16, 32)
________________________________________________________________
separable_2 (Sep.Conv.) [56, 56, 64] (3, 3, 32, 1)
________________________________________________________________
(1, 1, 32, 64)
________________________________________________________________
separable_3 (Sep.Conv.) [56, 56, 64] (3, 3, 64, 1)
________________________________________________________________
(1, 1, 64, 64)
________________________________________________________________
separable_4 (Sep.Conv.) [28, 28, 128] (3, 3, 64, 1)
________________________________________________________________
(1, 1, 64, 128)
________________________________________________________________
separable_5 (Sep.Conv.) [28, 28, 128] (3, 3, 128, 1)
________________________________________________________________
(1, 1, 128, 128)
________________________________________________________________
separable_6 (Sep.Conv.) [14, 14, 256] (3, 3, 128, 1)
________________________________________________________________
(1, 1, 128, 256)
________________________________________________________________
separable_7 (Sep.Conv.) [14, 14, 256] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 256)
________________________________________________________________
separable_8 (Sep.Conv.) [14, 14, 256] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 256)
________________________________________________________________
separable_9 (Sep.Conv.) [14, 14, 256] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 256)
________________________________________________________________
separable_10 (Sep.Conv.) [14, 14, 256] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 256)
________________________________________________________________
separable_11 (Sep.Conv.) [14, 14, 256] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 256)
________________________________________________________________
separable_12 (Sep.Conv.) [7, 7, 512] (3, 3, 256, 1)
________________________________________________________________
(1, 1, 256, 512)
________________________________________________________________
separable_13 (Sep.Conv.) [1, 1, 512] (3, 3, 512, 1)
________________________________________________________________
(1, 1, 512, 512)
________________________________________________________________
spike_generator (Sep.Conv.) [1, 1, 2048] (3, 3, 512, 1)
________________________________________________________________
(1, 1, 512, 2048)
________________________________________________________________
akida_edge_layer (Fully.) [1, 1, 10] (1, 1, 2048, 10)
________________________________________________________________
Learning Summary
____________________________________________
Learning Layer # Input Conn. # Weights
============================================
akida_edge_layer 2048 350
____________________________________________
stuart888
Regular
Higher level thinking about the architecture of the SNN model. No Loops? I was sitting over thing no loops computing, wow, that is the best architecture ever for a zillion use cases. Go spike go.
Ain't no loops. Spikes = No loops = Energy Efficiency = Everyone Wants it!
There are use case for loops! Akida = no loops? Very interesting is this Brainchip, has me captured.
Ain't no loops. Spikes = No loops = Energy Efficiency = Everyone Wants it!
There are use case for loops! Akida = no loops? Very interesting is this Brainchip, has me captured.
jtardif999
Regular
The article is from July 2020. I particularly like the following paragraph:JWPM CONSULTING
BrainChip ASX: Akida neuromorphic processor. AI at the edge.
Computer Chip with a human-like brain
This could be a Skynet moment. Radical new silicon chip that will change the world.jwpm.com.au
Dont know if already posted…but really a very good article about Brainchip and its future…
Akida™ will soon be the Model-T of neuromorphic processors
“Brainchip's first chip is now in production and technology company's have been working on applications for over 12 months.”
Akida IP was released in May 2019 so basically some (perhaps many) of our early access partners have been working on applications for more than 3 years now. Time to market for ARM customers turning designs into products has been described as about a 3 to 4 years. Seems to me things should start to explode over the next 12 months for Akida related products. AIMO.
Fastback6666
Regular
Interesting there are no large selling walls on BRN stock until around $1.195/$1.20 this morning.
Only 10 minutes out from open you would expect to see some closer to the open price.
Today may just be a softer day in the market with US futures a little red.
Only a daily observation and does not mean much for us long term investors.
Only 10 minutes out from open you would expect to see some closer to the open price.
Today may just be a softer day in the market with US futures a little red.
Only a daily observation and does not mean much for us long term investors.
Izzzzzzzzzzy
Regular
Announcements???
Izzzzzzzzzzy
Regular
Why tf did trading freeze for a second and then resume. ASX corruption
Good Morning Chippers,
US Senate passed the Climate Change Bill over the weekend.
Includes $369 billion US to expediate green technologies to meet greenhouse environmental targets.
Should be a shot in the arm for companys involved in earth saving technologies.
GO BRAINCHIP.
Wooo Hooo.
Smiling
.
Regards,
Esq.
US Senate passed the Climate Change Bill over the weekend.
Includes $369 billion US to expediate green technologies to meet greenhouse environmental targets.
Should be a shot in the arm for companys involved in earth saving technologies.
GO BRAINCHIP.
Wooo Hooo.
Smiling
.Regards,
Esq.
Hi Stuart,
This shows an array of 16 nodes, each with 4 NPUs.
The matrix is a representation of the layout of the nodes/NPUs in silicon.
The layers are the electrical inteconnexions of the NPUs.
https://www.bing.com/images/search?...tedindex=12&ajaxhist=0&ajaxserp=0&vt=0&sim=11
Last edited:
equanimous
Norse clairvoyant shapeshifter goddess
We are in the right place at the right time.Good Morning Chippers,
US Senate passed the Climate Change Bill over the weekend.
Includes $369 billion US to expediate green technologies to meet greenhouse environmental targets.
Should be a shot in the arm for companys involved in earth saving technologies.
GO BRAINCHIP.
Wooo Hooo.
Smiling
Regards,
Esq.
You want to save on power and increase performance, Companies just select and add BRN to cart.
Steve10
Regular
ARM Holdings built a name for itself via power savings. Saving power is a huge benefit.
ARM’s secret recipe for power efficient processing
There are several different companies that design microprocessors. There is Intel, AMD, Imagination (MIPS), and Oracle (Sun SPARC) to name a few. However, none of these companies is known exclusively for their power efficiency. One company that does specialize in energy efficient processors is ARM. That isn’t to say they don’t have designs aimed at power efficiency, but this isn’t their specialty. One company that does specialize in energy efficient processors is ARM.While Intel might be making chips needed to break the next speed barrier, ARM has never designed a chip that doesn’t fit into a predefined energy budget. As a result, all of ARM’s designs are energy efficient and ideal for running in smartphones, tablets and other embedded devices. But what is ARM’s secret? What is the magic ingredient that helps ARM to produce continually high performance processor designs with low power consumption?
In a nutshell, the ARM architecture. Based on RISC (Reduced Instruction Set Computing), the ARM architecture doesn’t need to carry a lot of the baggage that CISC (Complex Instruction Set Computing) processors include to perform their complex instructions. Although companies like Intel have invested heavily in the design of their processors so that today they include advanced superscalar instruction pipelines, all that logic means more transistors on the chip, more transistors means more energy usage. The performance of an Intel i7 chip is very impressive, but here is the thing, a high-end i7 processor has a maximum TDP (Thermal Design Power) of 130 watts. The highest performance ARM-based mobile chip consumes less than four watts, oftentimes much less.
And this is why ARM is so special, it doesn’t try to create 130W processors, not even 60W or 20W. The company is only interested in designing low-power processors. Over the years, ARM has increased the performance of its processors by improving the micro-architecture design, but the target power budget has remained basically the same. In very general terms, you can breakdown the TDP of an ARM SoC (System on a Chip, which includes the CPU, the GPU and the MMU, etc.) as follows. Two watts max budget for the multi-core CPU cluster, two watts for the GPU and maybe 0.5 watts for the MMU and the rest of the SoC. If the CPU is a multi-core design, then each core will likely use between 600 to 750 milliwatts.
Full article here:
ARM’s secret recipe for power efficient processing
There are several different companies that design microprocessors. There is Intel, AMD, Imagination (MIPS), and Oracle (Sun SPARC) to name a few. However, none of these companies is known exclusively for their power efficiency. One company that does specialize in energy efficient processors is ARM.
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