BRN Discussion Ongoing

[Taproot]

From a quick skim I couldn't see that TSMC uses FDSOI tech? Happy to be corrected.

Maybe this is part of the GF approach by BRN...additional tech / flexibility options?

Bit about FDSOI.

A Close Look at Major Microelectronics Challenges

To address the shortage of semi-conductors which continues to impact many sectors, including the automotive industry, and meet the growing need for electronic components, its production capacities must significantly increase.

www.leti-cea.com

Excerpt from mid 2022.

Where does CEA-Leti stand with regard to the European Chips Act?​

CEA-Leti supports the idea of creating three major drivers. One of the major drivers we have proposed would involve working on a technology that emerged in Europe, in our institute, FD-SOI. It is used to produce transistors, small switches that are indispensable to integrated electronic circuits and constituting the smallest processor value unit. Because it provides optimized energy consumption (with an energy saving of 30% compared to other technologies), FD-SOI is extremely interesting for 'embedded' markets, meaning electronics found in connected objects, autonomous cars, nomadic electronics, etc. Millions of connected loudspeakers or GPS microchips are now fitted with it. FD-SOI is also fueling smartphones, such as Google's latest pixel 6 Pro. Industrialized by STMicroelectronics, it is also sold by big companies such as Samsung and GlobalFoundries. FD-SOI is currently produced in 28 nm and 22 nm and will soon be available in 18 nm. To further improve the performance and energy efficiency of FD-SOI, the goal is now to move toward new electronic engineering technology, with ever-smaller 10-nanometer nodes that will meet low consumption market needs in 5 to 7 years. This miniaturization involves a major technological leap. Secondly (by 2026–2030), we will be focusing on GAA technology (Gate-All-Around, including a gate around the conduction channel) with nodes typically around 5 nm. One could say we've invented this technology (first publications in 2006 and first patent filed by CEA-Leti), which will constitute a breakthrough. The second major driver, supported by Imec, the Flemish Interuniversity Microelectronics Center, will be devoted to advanced generation FinFET chips — with nodes equal or less than 2 nm — which use the most advanced lithography techniques (Extreme UV) with equipment that will later be produced by Dutch world leader ASML. The third major driver, generated by the Fraunhofer Institute, in Germany, involves assembly and packaging, which will bring challenges in years to come.

Naturally, we will all need to work together, and we are in regular contact with both Imec and the Fraunhofer.


Also worth a skim through from a few years back.

FD-SOI Adoption Expands

FD-SOI Adoption Expands Technology shifts direction after years of competing directly with CMOS at advanced nodes.

semiengineering.com

Foundries Prepare For Battle At 22nm​

from 2018

But choosing one 22nm technology from a given foundry may be far different than 22nm at a different foundry. There are three different versions of 22nm being rolled out by different foundries:

• TSMC and UMC are developing a 22nm planar bulk CMOS process.
• GlobalFoundries is gearing up a 22nm planar FD-SOI technology.
• Intel is pushing a low-power 22nm finFET technology.

Foundries Prepare For Battle At 22nm

Foundries Prepare For Battle At 22nm Bulk CMOS, FD-SOI and finFETs all on tap as big players vie for differentiation. But where do chipmakers go after 28nm?

semiengineering.com

This article may answer a few questions in the the context of today's press release.

"The AKD1500 reference chip using GlobalFoundries’ very low-leakage FD SOI platform, showcases the possibilities for intelligent sensors in edge AI.” Anil Mankar

 

[Newk R]

If the SP is influenced by cold hard cash influxes then it will shape my investment strategy. If the SP is influenced by the date of a tape out then it will not reflect in m y strategy. Simples. So give me solid revenue figures and I know I'm onto something.

 

[GazDix]

Thank you so much @BienSuerte for sharing Tony's reply.
In a seperate discussion I had with @BaconLover earlier I also remembered Akida 1000 having a seperate announcement, so you are spot on @The Pope.
The precedent for reporting has changed under our new CEO as Tony has hinted. I would also predict that Ken Scarince had input too about the change after all the crap after speeding tickets, the patents that were late (but in a different time zone) and Brainchip obviously being targeted by the AFR, HC just as our new CEO joined us in November 2021.

Not only does WBT announce taping/successful fabs etc. but many other companies thrive on this like AXE (Archer Materials) and 4DS who only update tech improvements. So Brainchip can easily file these announcements with the ASX. There is being careful, but then being beyond paranoid (or is it strategic...) that we have stopped announcing anything that won't directly involve a revenue stream.

If I was paranoid, after being targeted by the ASX and the mainstream financial media in Australia who are not tech-savvy, or really paranoid that they know we will be gigantic like the next BHP division Blue Chip on the ASX and 'they' will gather all forces to collect shares and disrupt the leadership of my company, I would also be proper careful and conservative and take a very cautious approach.

Anyway, price is price. Business is business and business is looking up after today. Price always follows but not always in the way we hope.

 

[Taproot]

Foundries Prepare For Battle At 22nm​

from 2018

But choosing one 22nm technology from a given foundry may be far different than 22nm at a different foundry. There are three different versions of 22nm being rolled out by different foundries:

• TSMC and UMC are developing a 22nm planar bulk CMOS process.
• GlobalFoundries is gearing up a 22nm planar FD-SOI technology.
• Intel is pushing a low-power 22nm finFET technology.

Foundries Prepare For Battle At 22nm

Foundries Prepare For Battle At 22nm Bulk CMOS, FD-SOI and finFETs all on tap as big players vie for differentiation. But where do chipmakers go after 28nm?

semiengineering.com

This article may answer a few questions in the the context of today's press release.

"The AKD1500 reference chip using GlobalFoundries’ very low-leakage FD SOI platform, showcases the possibilities for intelligent sensors in edge AI.” Anil Mankar

An extract from the article.

FD-SOI
GlobalFoundries was the first player to enter the 22nm race. Three years ago the company introduced a 22nm FD-SOI technology. For some time, Samsung has offered 28nm FD-SOI with an 18nm version in the works.

In addition, GlobalFoundries is developing a 12nm planar version of FD-SOI, which is expected to appear in 2022. Generally, 22nm or 18nm FD-SOI doesn’t compete with 16nm/14nm finFETs, and they serve different markets with little overlap.

FD-SOI uses a specialized SOI wafer, which integrates a thin insulating layer (20 to 25nm thick) in the substrate. This layer isolates the transistor from the substrate, thereby blocking the leakage in the device.

FD-SOI also is based on a planar, fully depleted architecture. “This essentially eliminates the random dopant fluctuation, providing superior mismatch and electrostatics to improve sub-threshold slope,” GlobalFoundries’ Schaeffer said.

GlobalFoundries’ 22nm FD-SOI technology, called 22FDX, incorporates high-k/metal-gate with silicon-germanium in the channel. It provides 30% higher performance and 45% lower power compared to 28nm. It was production-qualified in early 2017.

Recently, GlobalFoundries added more capabilities to the mix. “Sub-6GHz RF, mmWave, ultra-low leakage and ultra-low power extensions have all been qualified,” Schaeffer said.

What makes FD-SOI attractive are two features—low-power and body bias. It enables drive currents of 910μA/μm (856μA/μm) at 0.8 volts, with voltage operations down to 0.4 volts.

“Body bias is the ability to fully control the threshold voltage (Vth) of the transistors dynamically by polarizing the back gate of the transistor. Vth—which was a parameter determinable only by process through complex doping techniques—is now programmable dynamically through software,” said Manuel Sellier, product marketing manager at Soitec. “Designers can use this feature to dynamically manage the leakage in their circuit, and also to compensate static (process) and dynamic variations (temperature, voltage, and aging) efficiently. The result is a 4X to 7X energy efficiency gain at ultra-low power.”

FD-SOI also supports forward body biasing. When polarization of the substrate is positive, the transistor can be switched faster, according to STMicroelectronics.

FD-SOI, however, has three drawbacks—cost, ecosystem and adoption. For years, FD-SOI has had limited adoption. Intel, TSMC, UMC and others have never adopted FD-SOI, saying bulk CMOS enables high-performance devices at better costs. For example, an SOI wafer sells from $370 to $400 each, compared to $100 to $120 for a bulk CMOS wafer.

But FD-SOI does have a lower mask count, which compensates for the wafer cost. FD-SOI has 22 to 24 mask steps, while a comparable bulk CMOS process has 27 to 29 mask steps, according to IBS.

FD-SOI is closing the gap, too. “We are now looking at what we view as the limit of bulk CMOS,” IBS’ Jones said. “Transistor costs for 22nm FD-SOI are within 5% of the transistor costs for 22nm HKMG (high-k/metal-gate). 22nm FD SOI gives 30% to 50% lower power consumption compared to 22nm HKMG, which is important for wearable and IoT devices.”

The FD-SOI community, however, lags in terms of the EDA/IP ecosystem. “The IP ecosystem for 22nm FD-SOI is strengthening, but 22nm HKMG bulk CMOS has a broader IP ecosystem,” Jones said.

The tide is turning. Cadence, Mentor and Synopsys have been certified for various EDA tools for GlobalFoundries’ FD-SOI technology.

“There are some unique capabilities for RF, for example, with integrated FD-SOI, which are very hard to equal in other ways,” said Wally Rhines, president and CEO of Mentor.

FD-SOI has other advantages. “While the finFET gives you near zero leakage, you still have dynamic power. One of the advantages of FD-SOI is dynamic power. If you can reduce the voltage from one volt down to 0.6, that’s a 65% reduction in power. FD-SOI has some advantages in being able to dynamically alter the power versus the performance balance,” Rhines said.

 

[Kachoo]

There hasn't been much talk about some of the finer points.
One I particularly like,
We expect our next
reference chips (plural) to be delivered in Q2 of this year.

Well maybe it's just that they will tape more then one chip. I would not read too much in to the wording. If I'm wrong then it's better for my pocket lol.

 

[Kachoo]

After reading the release again and checking in on past news I'm satisfied with the companies progress...

Taping out 1500 is excellent news. You know the more foundries that produce our chip and have our IP will really benifit us in the long run.

Think of it this way some customers prefer to use GL not TSCS and so forth. We will be hitting more customers potentially.

1.2 million receipts from customers is okay in my books. I look forward to February's year end report.

 

[Deleted member 118]

Thank you, for not posting cooked diatribe. Forum has really gone downhill last few days.

 

[Rise from the ashes]

So Rise, as @Bravo piles on the scaling-mountain-of-dots and @TECH outlines the logical timeframes, it has triggered your derisked-threshold?

Therefore, you activate a Binary Step Function to buy some more BRN. Very logical!!!
(Dio mentioned Step Functions and got me curious.)

https://towardsdatascience.com/getting-to-know-activation-functions-in-neural-networks-125405b67428

View attachment 28200

BRN has been de-risked for me for sometime, share price fluctuations are out of my control it's all about trying to pick a price I'm happy with topping up and imo the prices we are seeing are going to be dirt cheap compared to future price.

 

[ENZee2]

Attention all whining and whinging, lazy people, who are still holding mommies hand.
If you haven't registered on the companies website for email updates, then you don't deserve to know what's going on.
Don't be so, FFFing pathetic.

Here Here Post of the day

 

[Rise from the ashes]

Attention all whining and whinging, lazy people, who are still holding mommies hand.
If you haven't registered on the companies website for email updates, then you don't deserve to know what's going on.
Don't be so, FFFing pathetic.

Agreed WH, A few holder who I got in have previously stated 'whinge , whinge nothing going on with BRN " I've told them to sign up to company website also sub to brn YouTube channel also to sign up here. One is not too bad but the other I feel like slamming my elbow straight into his face, such a f dick.
Edit... Oh and of course when asked if the price was over a buck something a piece they would not give a flying shag with the lack of official news.
Edit 2 no one was harmed in the construction of this post.

 

[thelittleshort]

An extract from the article.

FD-SOI
GlobalFoundries was the first player to enter the 22nm race. Three years ago the company introduced a 22nm FD-SOI technology. For some time, Samsung has offered 28nm FD-SOI with an 18nm version in the works.

In addition, GlobalFoundries is developing a 12nm planar version of FD-SOI, which is expected to appear in 2022. Generally, 22nm or 18nm FD-SOI doesn’t compete with 16nm/14nm finFETs, and they serve different markets with little overlap.

FD-SOI uses a specialized SOI wafer, which integrates a thin insulating layer (20 to 25nm thick) in the substrate. This layer isolates the transistor from the substrate, thereby blocking the leakage in the device.

FD-SOI also is based on a planar, fully depleted architecture. “This essentially eliminates the random dopant fluctuation, providing superior mismatch and electrostatics to improve sub-threshold slope,” GlobalFoundries’ Schaeffer said.

GlobalFoundries’ 22nm FD-SOI technology, called 22FDX, incorporates high-k/metal-gate with silicon-germanium in the channel. It provides 30% higher performance and 45% lower power compared to 28nm. It was production-qualified in early 2017.

Recently, GlobalFoundries added more capabilities to the mix. “Sub-6GHz RF, mmWave, ultra-low leakage and ultra-low power extensions have all been qualified,” Schaeffer said.

What makes FD-SOI attractive are two features—low-power and body bias. It enables drive currents of 910μA/μm (856μA/μm) at 0.8 volts, with voltage operations down to 0.4 volts.

“Body bias is the ability to fully control the threshold voltage (Vth) of the transistors dynamically by polarizing the back gate of the transistor. Vth—which was a parameter determinable only by process through complex doping techniques—is now programmable dynamically through software,” said Manuel Sellier, product marketing manager at Soitec. “Designers can use this feature to dynamically manage the leakage in their circuit, and also to compensate static (process) and dynamic variations (temperature, voltage, and aging) efficiently. The result is a 4X to 7X energy efficiency gain at ultra-low power.”

FD-SOI also supports forward body biasing. When polarization of the substrate is positive, the transistor can be switched faster, according to STMicroelectronics.

FD-SOI, however, has three drawbacks—cost, ecosystem and adoption. For years, FD-SOI has had limited adoption. Intel, TSMC, UMC and others have never adopted FD-SOI, saying bulk CMOS enables high-performance devices at better costs. For example, an SOI wafer sells from $370 to $400 each, compared to $100 to $120 for a bulk CMOS wafer.

But FD-SOI does have a lower mask count, which compensates for the wafer cost. FD-SOI has 22 to 24 mask steps, while a comparable bulk CMOS process has 27 to 29 mask steps, according to IBS.

FD-SOI is closing the gap, too. “We are now looking at what we view as the limit of bulk CMOS,” IBS’ Jones said. “Transistor costs for 22nm FD-SOI are within 5% of the transistor costs for 22nm HKMG (high-k/metal-gate). 22nm FD SOI gives 30% to 50% lower power consumption compared to 22nm HKMG, which is important for wearable and IoT devices.”

The FD-SOI community, however, lags in terms of the EDA/IP ecosystem. “The IP ecosystem for 22nm FD-SOI is strengthening, but 22nm HKMG bulk CMOS has a broader IP ecosystem,” Jones said.

The tide is turning. Cadence, Mentor and Synopsys have been certified for various EDA tools for GlobalFoundries’ FD-SOI technology.

“There are some unique capabilities for RF, for example, with integrated FD-SOI, which are very hard to equal in other ways,” said Wally Rhines, president and CEO of Mentor.

FD-SOI has other advantages. “While the finFET gives you near zero leakage, you still have dynamic power. One of the advantages of FD-SOI is dynamic power. If you can reduce the voltage from one volt down to 0.6, that’s a 65% reduction in power. FD-SOI has some advantages in being able to dynamically alter the power versus the performance balance,” Rhines said.

My vote is for satellites

FDX™ FD-SOI | GlobalFoundries

Purpose-built for connected intelligence at the edge

gf.com

 

[Taproot]

This from August 21
Looks like AKD500 will be next

What does the road ahead look like for Akida?
AKD1000 is only the beginning of what the company expects to be a robust product portfolio (Figure 33): – AKD500: BRN is in the planning stages for AKD500, which is a low-cost version of the AKD1000, for the consumer products market. – AKD1500: BRN is also in the process of developing and prototyping AKD1500, which will have additional features to execute Long Short-Term Memory (LSTM) and Transformer networks. LSTM is a form of recurrent neural network which can learn order dependence in sequence prediction problems. It finds applications in machine translation and speech recognition. Transformer networks, on the other hand, find their applications in natural language processing (NLP) due to their ability to resolve the vanishing gradient problem – the time for which the memory is retained by the network, which is critical in order to process lengthy texts. – AKD2000: It is the optimised version of AKD1500 and the company has already started work on a prototype at its lab in Perth.

 

[Rise from the ashes]

Am I mistaken but I do recall that these different versions of chips can all be combined at a later stage?

 

[Getupthere]

In electronics and photonics design, tape-out or tapeout is the final result of the design process for integrated circuits or printed circuit boards before they are sent for manufacturing. The tapeout is specifically the point at which the graphic for the photomask of the circuit is sent to the fabrication facility.

 

[cassip]

BRN

 

[Cirat]

BRN

Always loved the clean, crisp and visually standout nature of our new website as well as the kite which they use in marketing material such as the recently released White Paper.
The kite reminds me of a song (decades ago) which says it all about Brainchip:

"Let's go fly a kite
Up to the highest height
Let's go fly a kite
And send it soaring
Up through the atmosphere
Up where the air is clear
Oh, let's go fly a kite"

Nothing more to say

 

[White Horse]

I think what happened was we have had a huge runs over the last couple of years and retraced well too.
We have had a few Anns like NASA, Ford etc which caused massive runs after BRN was asked to ''please explain''.
We have plenty of organisations such as AFR, Motley Fools etc., their friends, other hedge funds, instos... who all would ask for a ''fair and reasonable'' market by reporting these to ASX (I say this because I know there are reporters on AFR who specialise in this sort of reporting and have listened to their side of story myself).
Unfortunately retails are not in their club so our reports will be in the bin straight away.

I believe WBT isn't having such huge volatility and is possibly flying under the radar already so they wouldn't have an issue. Their SOI is comparatively lower, at around 173 million and out of that around 34 million is with top 20. Not much room for the big guys to play around.

These are only my opinion only, dyor.



Exactly

Hi BL,
It's not "exactly", because I was not supporting an argument for more disclosure.
I was pointing out that Weebit are going the same FAB route as us with 22nm FD-SOI.
Nothing to do with the argument you and others have been flogging to death all day.
If you and others can't get you mind around the companies disclosure policy, you should sell
and buy into these other companies of which you are so enamored.
Actually , not just today, but what seems like forever.

Regards
WH

 

[JK200SX]

I had to read that a couple of times too. I believe they meant.......

BRN have released the design to Global Foundries and expect they will have the chips manufactured and returned to BRN in the 2nd quarter.

We expect our next
reference chips (plural) to be delivered in Q2 of this year.

Question: Do people read this as (many/plural) AKIDA1500 chips being delivered in Q2, or does the plural imply Akida1500, AKIDA500, AKIDA2000, etc?

 

[TECH]

Good evening, well it's still rather hot here in Perth 33c as I write this.

Today's release of the quarterly I found to be pleasantly surprising, the results reflected our company maintaining good control over the expenses, modest cash receipts which was to be expected.

It was good to see the CEO actually name the Akida chip, so now we all know that the reference chip is AKD 1500.

A USB version will be coming, as this has already been mentioned by a company employee in a recent video with one of the Universities we are engaged with, I did find that disclosure rather interesting given whom it was mentioned to.

Nice grants of nearly $700,000 USD to help out with the current R&D expenses, some of you may think too much is being spent in this department, but we must progress, that old saying rings true, "you only truly get what you pay for"...Peter, Anil and all our engineers could probably earn more elsewhere, but I have a feeling that their passion isn't always all about money, more of an addiction, and I say that in a respectful manner.

Finally, Seans comment I really enjoyed reading was the one I have been harping on about recently.

"In the coming quarter, the Company will focus on key sales targets and converting technical evaluations into paid licenses"

You will remember that the company made almost a U-Turn when approximately 3 months prior to our last AGM we gave up the business model of being a chip supplier to solely become a potential leading supplier of Edge AI IP, proven in silicon and truly unmatched to date by any other company, despite many articles that allegedly state otherwise.

The journey continues......keep watching this space.

Tech

 

[BaconLover]

Hi BL,
It's not "exactly", because I was not supporting an argument for more disclosure.
I was pointing out that Weebit are going the same FAB route as us with 22nm FD-SOI.
Nothing to do with the argument you and others have been flogging to death all day.
If you and others can't get you mind around the companies disclosure policy, you should sell
and buy into these other companies of which you are so enamored.
Actually , not just today, but what seems like forever.

Regards
WH

" I was pointing out that Weebit are going the same FAB route as us with 22nm FD-SOI."
I was saying the same thing too, no need to get worked up.

As to selling my shares, it's none of your business how I invest and trade. I own shares in this company, and I'll share my views here. It's not your private property to tell me what to do.

As to everything else,
Of course you're entitled to your opinion.
Have a great evening.