BRN Discussion Ongoing

[Fullmoonfever]

I see mid last year that Renesas developed some additional tech for 22nm.

Wonder if AKD1500 can integrate here as well given Renesas comments on the dev need?

https://www.renesas.com/tw/en/about/press-room/renesas-develops-circuit-technologies-22-nm-embedded-stt-mram-faster-read-and-write-performance-mcus

Renesas Develops Circuit Technologies for 22-nm Embedded STT-MRAM with Faster Read and Write Performance for MCUs in IoT Applications


TOKYO, Japan ― Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, today announced that it has developed circuit technologies for an embedded spin-transfer torque magnetoresistive random-access memory (STT-MRAM, hereinafter MRAM) test chip with fast read and write operations fabricated using a 22-nm process. The test chip includes a 32-megabit (Mbit) embedded MRAM memory cell array and achieves 5.9-nanosecond (ns) random read access at a maximum junction temperature of 150°C, and a write throughput of 5.8-megabyte-per-second (MB/s).

Renesas presented these achievements on June 16 at the 2022 IEEE Symposium on VLSI Technology and Circuits, held between June 12 and 17 in Hawaii.

As the advances of IoT and AI technologies continue, microcontroller units (MCUs) used in endpoint devices are expected to deliver higher performance than ever, and therefore need to be fabricated with finer process nodes. MRAM fabricated in BEOL (Note 1) is advantageous compared to flash memory fabricated in FEOL (Note 2) for sub-22 nm processes because it is compatible with existing CMOS logic process technology and requires fewer additional mask layers. However, MRAM has a smaller read margin than flash memory, which degrades read speed. A large gap between the CPU operating frequency and the read frequency of the non-volatile memory is also a challenge since it can degrade MCU performance.

 

[Beebo]

Completing tapeout of Akida 1500 could be considered to be the IT equivalent of converting a resource estimate from "inferred" to "proven". The initial circuit design "estimated" that it was feasible.

Then there was the quickly forgotten nearology item about MegaChips and MorseMicro, reinforced by the discovery that several MorseMicro engineers are following BrainChip.

MicroMorse was founded by the inventors of WiFi, so they would have better insight than most into how the next generation on micro-networks should develop.

MorseMicro has the potential to provide the communications network for the connected IoT.

It is quite possible that Akida could improve the operation of the MorseMicro ultra-low-power, ultra-long-range WiFi, and both being under the auspices of MegaChips enhances the possibility of a collaboration.

But is MorseMicro a “communications” company? (Rhetorical)

 

[buena suerte :-)]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

 

[thelittleshort]

Previous specs published show AKD1500 with LSTM and transformer networks, however, the tape-out announcement doesn't specifically mention these two features but rather it says " The AKD1500 uses the latest features of BrainChip's extremely energy-efficient, event-based, Akida™ AI IP."

I wonder why LSTM and transformer networks weren't mentioned specifically? I know it mentions GlobalFoundries' leaky boat technology but what else could the latest features from Akida IP be if not LSTM and transformer networks?

View attachment 28234

Hi @Diogenese

1. What is the process to get from AKD1500 to AKD2000, given that it is now 'simply' optimising a taped out iteration? Is the hard work already done? Or is there significant engineering involved to incorporate LSTM/transformer functionality?
2. Based on 1. how difficult would it be to also release AKD2000 in 2023? Given that we have no clue how far PvdM has already advanced future AKD iterations

I'm still hoping we announce another BrainChip product release this year, but this one with more fanfare ie in conjunction with a Tier 1 partner or two

 

[Townyj]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

Good to see its a definite NO! To...

Thanks for posting the response Bien.. appreciated.

 

[misslou]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

Bookmarked for the next time this happens. Poor Tony having to repeat himself over and over again, and well done to the company for doing exactly as they should have done

 

[Violin1]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

Great response. Thanks Tony and thanks @BienSuerte for posting. I do think most of it has been said before but it seems to need to keep repeating. All Tony missed out was......patience grasshopper......

 

[Andi85]

My take is that The company does watch this space and listens to what 1000 eyes have to say.

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

 

[BaconLover]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

Thank you for sharing @BienSuerte

The question still remains.

Why does ASX have 2 different rules for 2 different companies on the same type of news?

Why is it a company such as WBT able to make this news ''price sensitive'' and BRN has to put out a Twitter post/media article?

What is the standard practice? Treating 2 companies differently on the same sort of news - the way I see it is discriminatory from ASX.

Below is the WBT announcement. Once you have read it, please read the BRN media release.



( On that note, GF and CE-Leti are in partnership )

 

[Bravo]

So does that mean that once AKD1500 is manufactured that we'll join the Global Foundaries' FDX™ Network with the likes of Andes, Siemens, Cadence, Synopsys, SiFive, Fraunhofer and many others?

• Technology Platforms
• Markets
• Manufacturing Services
• GF Communities
• About Us
• Careers
• GF Newsroom

Home / GF Partner Community / FDX™ Network

FDX™ Network​

The FDX™ Network, formerly called the FDXcelerator Partner Program, enables designers to accelerate time to market with cost-effective, differentiated semiconductor chips that harness the unique differentiated, power-saving, body-biasing and adaptive body-biasing features of the GlobalFoundries® (GF®) 22FDX® platform (built on 22 nm FD-SOI process technology).

By leveraging the FDX™ Network, partners and customers can harness collaborative innovation through optimized FDX™ resources to increase market share and take advantage of growth opportunities in automotive, industrial, consumer IoT, mobile, RF connectivity and networking applications.
Extensive range of FDX-optimized services & solutions enables differentiation that matters. Broad portfolio of validated IP blocks helps shorten design cycle and reduce risk.

View Product Brief

Get to market quicker​

Streamline design, increase productivity and get products to market faster with a suite of 22FDX-optimized solutions, domain expertise and resources.

Simplify migration​

The FDX™ Network makes moving to FD-SOI from bulk nodes easier and faster, enabling designers to harness the power and performance advantages of 22FDX® to develop differentiated, integrated solutions.

Minimize cost & risk​

The FDX™ Network enables low-cost, low-risk and rapid prototyping for product/market validation, IP validation and device characterization through the GF multi project wafer (MPW) service.

Explore the program​

To learn more about the FDX™ Network, contact us at ecosystem_support-uc@globalfoundries.com.

Meet our FDX™ Network partners​

• Ultra-low-power PMU IP in 22FDX®, 10+ PMU IPs provides more selection
• IPs in other GF processes are available, including proven eNVM IP

• Lowest power Gigasample-class data converter IP available in advanced GlobalFoundries technology
• Ideal for any high sample rate, low power applications
• Radiation-tolerant and radiation-hardened versions available

• Providers of advanced packaging, assembly and test development services
• 22FDX® platform support and baseline package qualifications. Package types anticipated to be qualified are:
  • Flip chip – Chip Scale Package (FcCSP)
  • Wafer level – Chip Scale Package, Fan Out- (WlCSP-FO)
  • Wire Bond

• Analog Value Ltd. offers a family of dual ADC IPs in 22FDX® process with resolution ranging from 12b to 16b and sample rate from 5Msps to 50Msps
• The ADCs have very small area and power consumption

• Andes provides power-efficient, small-footprint 32-bit and 64-bit soft CPU IP cores implemented on GF’s 22nm FD-SOI (22FDX®) technology, especially well-suited for the IoT, edge computing and deep learning SoC design
• Andes provides a comprehensive ecosystem, including the most mature support for RISC-V processor cores

• ANSYS multiphysics simulation enables chip-package-system (CPS) success in 7nm FinFET, RFIC and 22FDX in AI, 5G, automotive and HPC applications
• Solve physically-coupled design challenges of power, thermal, variability, timing, electromagnetics and reliability across CPS

• ArterisIP interconnect IP accelerates timing closure for FDX-based designs, in applications from automotive ADAS and machine learning to small IoT processors
• ArterisIP FDX-based offerings include the Ncore Cache Coherent Interconnect IP with Ncore Resilience Package, FlexNoC Interconnect IP with FlexNoC Resilience Package and PIANO Timing Closure Package

• Providers of advanced packaging, assembly and test development services
• 22FDX® platform support and baseline package qualifications. Package types anticipated to be qualified are:
  • Flip chip – Chip Scale Package (FcCSP)
  • Wafer level – Chip Scale Package, Fan In – (WlCSP-FI)
  • Wafer level – Chip Scale Package, Fan Out – (WlCSP-FO)

• Highly integrated IoT systems-on-chip comprising front ends, radios, mixed-signal, power management, PHY and modem
• Turnkey best-in-class full-chip RFIC and modem design services for clients’ system solutions

• Founded in 2010, Attopsemi Technology is dedicated to developing proprietary I-fuse™ OTP IP to all CMOS process technologies from 0.7um to 7nm and beyond.
• I-fuse™ OTP provides small size, high reliability, low program voltage, low power and wide temperature range to enable harsh applications such as automotive, 3D IC, and IoT applications.

• Body Bias floor planning via Genus™ design exploration
• FDX-tailored support for Voltus™ and Tempus™ solutions

• Leading provider of low-power certified IP solution for Wireless Connectivity standards (WiFi, Bluetooth, Thread, NB-IoT, GNSS etc.) for consumer and IoT applications
• Offers efficient AI & Deep Learning Processor IPs for Imaging and Computer Vision Edge IoT & Automotive Applications

• We offer ultra-low-power IP for next generations of hearables and wearables
• We are using FDX22nm due the highly optimized process node for these applications (SOI, BB, etc…)

• World-class radio/antenna advanced test and characterization facility, electromagnetic simulation and modeling from MHz to THz
• Intelligent mmWave phased array/MIMO integrated circuit, module, antenna, system-in-package, IP and R&D

• Offers a complete portfolio of configurable RISC-V based processor IP cores
• Provides a comprehensive processor development platform with full software toolchain support

• CoreHW is your one-stop custom ASIC solution partner
• CoreHW competences cover RF systems; RFIC; analog, mixed signal and digital; RF front-end and antennas

• CSEM is a supplier of design services and silicon IPs, recognized as a leader for very low-power ICs & systems, and a rich history & IP catalog in ULP digital, RFICs and embedded machine learning
• CSEM’s IcyTRX, best-in-class Bluetooth Low Energy silicon RF IP, is integrated in millions of chips worldwide

 

[Bravo]

• WaveIntegrity™ is a comprehensive software suite that integrates seamlessly into any client flow to tackle SLN during digital, analog or RF IP authoring and full system integration, from RTL to tape out
• SiPEX™ accurately models interactions between devices, back-end-of-line, and silicon-on-insulator (SOI) substrates enabling RF front end module designers to fully simulate layout and design changes with accuracy, speed and seamless design flow interoperability

• Dolphin Integration SoC Fabric IP streamlines and speeds-up the design of cost-effective low-power SoC in 22FDX® technology
• Dolphin Integration 22FDX® IP library includes power-saving voltage regulators, power gating cells and logic modules

• Provides reliable OTP IP, NeoFuse, for sophisticated SoC designs on 22FDX® process technology targeting mobile, IoT, and RF connectivity applications
• Offers comprehensive, cost-effective, and customizable logic NVM solutions

• Empyrean’s high speed SarADC IP in 22FDX® provides high performance with ultra low power
• Empyrean’s worldwide support team provides timely, strong support

• Design services for Automotive, CCS, and RF
• Value-add services include firmware development and pre/post silicon validation

• EXTOLL provides leading-edge semiconductor IP for the interconnect market.
• High-performance, low latency SERDES PHY, which provides interconnect solution from 2.5 to 32 Gpbs, and high-speed, low-jitter LC-PLL are both silicon proven in several process nodes.

• A leading applied research and development center for ASIC, system-on-chip (SoC), and IP
• Offers dynamic biasing IPs for advanced SoC designs in 22FDX® technology

• A total RF, mmWave, digital and mixed-signal test solution provider, from test fixture design, test program development on ATE/ Bench and RF HTOL reliability test to production
• Die processing service: Back grinding, laminate, laser mark, laser grooving, dicing, AOI, singulated wafer probing and T&R with six-side visual inspection

• OSAT provider to apply TSVs for CIS package in mass production
• OSAT provider with CIS product turn-key services from chip package to module

• Ensigma is a leader in delivering wireless connectivity and broadcast IP solutions
• Provides a single-source solution for low-power connectivity including Wi-Fi, BLE and 802.15.4

• IN2FAB Technology specializes in migrating schematic and layout data of IP in other processes to 22FDX® technology
• Circuits can be translated from other GLOBALFOUNDRIES processes or from third party foundries in a fraction of the time taken for redesign

 

[Bravo]

• Silicon-to-systems range of engineering services
• Software services ranging from various firmware, embedded and applications-specific offerings

• Characterization, simulations and modeling services for substrates, active and passive devices for analog and RF applications and MEMS, with a special focus on the FEM. Our services cover on-wafer and packaged components testing
• Incize’s capabilities include small- and large-signal, wideband, nonlinear and noise behaviors, as well as harsh environment and radiation hardness applications

• Innosilicon provides silicon-validated complex interface IPs in 22FDX®, 14LPP, 28SLP and other nodes with high performance, fully customizable solutions
• Leading one-stop-shop IP and turnkey solutions

• ID-Xplore™: a Fast Design and Migration tool for analog IPs
• ID-Xplore™ provides full support for static and dynamic body biasing in FD-SOI technologies

• Intrinsix is a Semiconductor Design Solutions company with over 30 years’ experience working with GlobalFoundries process offerings across many technologies including 22FDX®, 12LP/LPP and 8HP process nodes.
• Intrinsix has expertise in Digital, Analog, Mixed-Signal, and RF applications for Commercial and Consumer applications as well as Aerospace/Defense/Government programs.

• Silicon Validated Foundation and Complex IP
• Portfolio ranging from Foundry Certified Foundation IP to a complete ASIC solution

• Industry-leading RapidIO IP in 22FDX®
• Strong local support provides professional service to clients

• Credentialed FD-SOI expertise on system design, IC design, and fast prototyping
• IoT, RF, and ADAS SoC realization focus

 

[Bravo]

• 
  RFwave-tailored circuit simulators with tight integration of 3D EM simulation technologies enabling co-simulation of chip level RF circuit blocks, multi-chip and multi-technology modules
• An interoperable IC design platform

• Provides embedded FPGA (eFPGA) IP in 22FDX® System-on-Chip (SoC) designs targeting a variety of applications, including automotive ADAS, vision processors and ISP
• eFPGA IP is highly flexible — the number of logic blocks as well as the type and number of arithmetic and memory blocks are fully customizable

• Mixel is a leading provider of mixed-signal IPs and offers a wide portfolio of high-performance mixed-signal connectivity IP solutions.
• Mixel’s mixed-signal portfolio includes PHYs and SerDes, such as MIPI D-PHYSM, MIPI M-PHY®, MIPI C-PHYSM, LVDS, and many dual mode PHY supporting multiple standards. Available in GlobalFoundries 22FDX® technology platform.

• Mobile Semiconductor offers leading edge SRAM, ROM and Register File compilers optimized for applications requiring ultra-low power, low leakage, or ultra-high performance
• Mobile Semiconductor’s 22nm FD-SOI (22FDX®) low leakage compilers provide retention currents in the nanoamp range with configurable clock rate from 50 MHz to 500 MHz to trade off leakage versus performance

• High-quality VbyOne IP in 22FDX®, more high-speed IPs, display IPs and analog IPs are portable to 22FDX®
• Strong support system and flexibility on IP customization

• All-digital PLL IP and complementary design solutions for 22FDX®
• Custom IC design and physical implementation services for GF FD-SOI process technologies

• BSIMProPlus™, ME-Pro™: industry’s leading modeling solution, SPICE model extraction, customization & QA, process platform evaluation & benchmark, for Bulk, FD-SOI, FinFET technologies
• NanoSpice™, NanoSpice Giga™: new SPICE and FastSPICE simulators, fully leverage parallel computing power to achieve accurate, fast and economic circuit simulation & verifications for big FD-SOI & FinFET designs

 

[Bravo]

• Mass production proven ultra-low power embedded FPGA
• Complete SW support for FPGA design and SoC integration in 22FDX®

• GF channel partner providing IP and design services for 22FDX® process technology
• “makeChip” design service platform provides an IT infrastructure with EDA tools and technology data setup

• Cryptofirewall cores which complement security implementations
• DPA counter measure solution offerings to enhance security measures

• Offers low-power 64-bit RISC-V CPU IP cores available on 22FDX® process technology
• Industry leader in low-power, asynchronous design focused on embedded computer vision and artificial intelligence

• Software solutions and processes for IoT, automotive and industrial and emerging device technologies
• Offer turnkey solutions including hardware and software for complete SoC production

Siemens is dedicated to helping companies engineer a smarter future faster. Siemens is committed to delivering the world’s most comprehensive portfolio of embedded software solutions as well as electronic design automation (EDA) software, hardware, and services. What’s more, Siemens is breaking down the barriers between electrical, mechanical and software design disciplines, between design and manufacturing, bridging virtual and physical design and manufacturing, enabling companies to more rapidly advance in their digital transformation and evolve from systems to market-leading ecosystems companies with the Siemens Xcelerator portfolio.

• Provides RISC-V CPU IP including SiFive’s E31 and E51 RISC-V cores available on GF’s 22FDX® process technology
• Founded by the inventors of RISC-V and the first fabless provider of customized semiconductors based on the free and open instruction set architecture

• Silicon Creations provides world-class PLLs, low power, high-performance SerDes and high-speed differential I/Os with IP in production from 10nm to 180nm and proven in 7nm
• Silicon Creations’ GLOBALFOUNDRIES 22nm FDX General purpose Fractional-N PLL is wide range, being able to generate any frequency between 25MHz and 5GHz with a precision of better than 0.01ppm

• SmartSpice™ and Utmost IV™ – Simulation, optimization and characterization of spice models for analog FDX circuits
• iPDK’s for FDX technology for Silvaco’s custom design flow

• Sofics (Solutions for ICs), a foundry independent IP company, offers solutions that lower cost, increase revenue and profit, reduce operational risk and create value for (AS)IC customers
• Solutions enable normal operation high performance (despite and with ESD protection), higher ESD robustness where needed and in an economic fashion and first-time-right patented designs, available off-the-shelf at reduced silicon, development and IP costs

• Best-in-class low power “PowerMiser” and ultra low voltage “EverOn” SRAM offerings available on GF’s 22nm FD-SOI (22FDX®) process technology
• sureCore’s industry-leading, low power SRAM technology meets both challenging power budgets and manufacturability constraints posed by today’s visionary IoT, wearable and medical products

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare® IP portfolio includes logic libraries, embedded memories, PVT sensors, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware

• DDR Interface IP, based on 14 issued patents, provides the right power, performance, area and reliability for FDX™-based SoCs in portable applications
• Wide range of “ideas2silicon” services that span design specification, RTL, logic design/verification, physical implementation, and manufacturing operations.

• One-stop-shop turnkey solution
• China-based, with complete FDX-tailored ASIC platform capability and services

• IP customization services on silicon-proven microwave front-ends and synthesizers up to mmWave frequencies
• World class transceiver designs for backhaul, 5G, 802.11.* and RADAR applications

Xenergic provides ultra-low power SRAM for wide application categories ranging from ultra-low power to high-speed. Xenergic’s MemoryTailorTM provides the best memory configuration for each application’s specific needs.

• Analog/RF IC EDA suite enabling fast passive modeling and simulation at advanced technology nodes
• Integrated passive devices (IPD) solution enabling system miniaturization for RF front-end module designs

• High speed high performance multi-protocols Serdes PHY solution (up to 16G) for 22FDX®
• High performance analog IPs (ADC/DAC/PLL/PMU/AFE) provider

FDX™ Network | GlobalFoundries

By leveraging the FDX™ Network, partners and customers can harness collaborative innovation through optimized FDX™ resources to increase market share […]

gf.com

 

[Slade]

HI Guys & Gals regarding my earlier post a 'good old fashioned' ASX announcement!!...

I have received this message from Tony and he has asked me to share this with you all and hopes it answers many questions and doubts we are having re ASX announcements.

Very much appreciated and many thanks to you Tony.

Hi BienSuerte

Happy new year to you.

I picked on your comment on TSE and I've been deluged by similar comments today from other shareholders, so please allow me to clarify and share my thoughts with you and others on TSE.

Firstly, to ensure you don't miss out on any news from BrainChip, I recommend you go to our website and subscribe to receive all updates so when we release press releases or ASX announcements you wont miss anything important, and you wont have to rely solely on the "1000 Eyes" .

Secondly, while the tapeout of Akida1500 reference chip represents an important progression in the development of our IP portfolio and demonstrates our ability to customise our neuromorphic chip architecture to meet specific end-user requirements, the news itself has no immediate revenue or financial implications, and is therefore neither material nor price sensitive. Todays share price reaction to this news would appear to bare that point out. The threshold for these matters is "materiality" and its not always as clear cut as it seems from the outside.

As we've discussed in person, and I've discussed at countless retail investor engagements and in thousands of emails, we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules. The decision to make an ASX announcement or a media release is discussed by our Board of Directors and our Executive Leadership Team and guided by the advice of our Company Secretary. I certainly have input into those discussions, but ultimately its a decision made by the CEO. We don't make these decisions lightly and we certainly do consider the expectations of shareholders and the market in those debates, but ultimately we are guided by the law and especially by the ASX, especially in regard to "ramping announcements". To have made an ASX announcement about the tape out of Akida1500 would have been a ramping announcement, as defined by the ASX.

I know that everyone has their own opinions on these matters, but opinions aren't facts. The fact is we are disclosing everything we are required to disclose and we are applying a conservative interpretation of the ASX continuous disclosure obligations, because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations. We are not doing that again and we have sought advice from the ASX Compliance Team to satisfy ourselves that we are operating in compliance with their rules. This is not only good corporate governance but also a way of minimising our risk of regulatory intervention.

I know its probably a vain hope on my part that this note will end this discussion for good, but I hope it at least proves that we do listen to our shareholders and we are aware of their views and expectations. Please feel free to share this note on the BRN Discussion thread and I look forward to catching up with you at our next TSE-BRN Investor function in Perth. My best wishes to you and your lovely wife.

Regards

Tony Dawe

Thank you @BienSuerte and Tony Dawes. That’s good enough for me.

 

[buena suerte :-)]

• Mass production proven ultra-low power embedded FPGA
• Complete SW support for FPGA design and SoC integration in 22FDX®

• GF channel partner providing IP and design services for 22FDX® process technology
• “makeChip” design service platform provides an IT infrastructure with EDA tools and technology data setup

• Cryptofirewall cores which complement security implementations
• DPA counter measure solution offerings to enhance security measures

• Offers low-power 64-bit RISC-V CPU IP cores available on 22FDX® process technology
• Industry leader in low-power, asynchronous design focused on embedded computer vision and artificial intelligence

• Software solutions and processes for IoT, automotive and industrial and emerging device technologies
• Offer turnkey solutions including hardware and software for complete SoC production

Siemens is dedicated to helping companies engineer a smarter future faster. Siemens is committed to delivering the world’s most comprehensive portfolio of embedded software solutions as well as electronic design automation (EDA) software, hardware, and services. What’s more, Siemens is breaking down the barriers between electrical, mechanical and software design disciplines, between design and manufacturing, bridging virtual and physical design and manufacturing, enabling companies to more rapidly advance in their digital transformation and evolve from systems to market-leading ecosystems companies with the Siemens Xcelerator portfolio.

• Provides RISC-V CPU IP including SiFive’s E31 and E51 RISC-V cores available on GF’s 22FDX® process technology
• Founded by the inventors of RISC-V and the first fabless provider of customized semiconductors based on the free and open instruction set architecture

• Silicon Creations provides world-class PLLs, low power, high-performance SerDes and high-speed differential I/Os with IP in production from 10nm to 180nm and proven in 7nm
• Silicon Creations’ GLOBALFOUNDRIES 22nm FDX General purpose Fractional-N PLL is wide range, being able to generate any frequency between 25MHz and 5GHz with a precision of better than 0.01ppm

• SmartSpice™ and Utmost IV™ – Simulation, optimization and characterization of spice models for analog FDX circuits
• iPDK’s for FDX technology for Silvaco’s custom design flow

• Sofics (Solutions for ICs), a foundry independent IP company, offers solutions that lower cost, increase revenue and profit, reduce operational risk and create value for (AS)IC customers
• Solutions enable normal operation high performance (despite and with ESD protection), higher ESD robustness where needed and in an economic fashion and first-time-right patented designs, available off-the-shelf at reduced silicon, development and IP costs

• Best-in-class low power “PowerMiser” and ultra low voltage “EverOn” SRAM offerings available on GF’s 22nm FD-SOI (22FDX®) process technology
• sureCore’s industry-leading, low power SRAM technology meets both challenging power budgets and manufacturability constraints posed by today’s visionary IoT, wearable and medical products

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare® IP portfolio includes logic libraries, embedded memories, PVT sensors, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys’ extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware

• DDR Interface IP, based on 14 issued patents, provides the right power, performance, area and reliability for FDX™-based SoCs in portable applications
• Wide range of “ideas2silicon” services that span design specification, RTL, logic design/verification, physical implementation, and manufacturing operations.

• One-stop-shop turnkey solution
• China-based, with complete FDX-tailored ASIC platform capability and services

• IP customization services on silicon-proven microwave front-ends and synthesizers up to mmWave frequencies
• World class transceiver designs for backhaul, 5G, 802.11.* and RADAR applications

Xenergic provides ultra-low power SRAM for wide application categories ranging from ultra-low power to high-speed. Xenergic’s MemoryTailorTM provides the best memory configuration for each application’s specific needs.

• Analog/RF IC EDA suite enabling fast passive modeling and simulation at advanced technology nodes
• Integrated passive devices (IPD) solution enabling system miniaturization for RF front-end module designs

• High speed high performance multi-protocols Serdes PHY solution (up to 16G) for 22FDX®
• High performance analog IPs (ADC/DAC/PLL/PMU/AFE) provider

FDX™ Network | GlobalFoundries

By leveraging the FDX™ Network, partners and customers can harness collaborative innovation through optimized FDX™ resources to increase market share […]

gf.com

WOW ... to 'all' of the above ... nice work Bravo

 

[mcm]

My take is that The company does watch this space and listens to what 1000 eyes have to say.

Thank you for sharing @BienSuerte

The question still remains.

Why does ASX have 2 different rules for 2 different companies on the same type of news?

Why is it a company such as WBT able to make this news ''price sensitive'' and BRN has to put out a Twitter post/media article?

What is the standard practice? Treating 2 companies differently on the same sort of news - the way I see it is discriminatory from ASX.

Below is the WBT announcement. Once you have read it, please read the BRN media release.



( On that note, GF and CE-Leti are in partnership )



View attachment 28245

Exactly ... from Tony's response it seems BRN didn't even submit the tape out announcement to the ASX for publication. Just decided amongst themselves it would constitute ramping rather than reporting a very significant technical milestone.

Thank you @BienSuerte and Tony Dawes. That’s good enough for me.

 

[Earlyrelease]

Thank you for sharing @BienSuerte

The question still remains.

Why does ASX have 2 different rules for 2 different companies on the same type of news?

Why is it a company such as WBT able to make this news ''price sensitive'' and BRN has to put out a Twitter post/media article?

What is the standard practice? Treating 2 companies differently on the same sort of news - the way I see it is discriminatory from ASX.

Below is the WBT announcement. Once you have read it, please read the BRN media release.



( On that note, GF and CE-Leti are in partnership )



View attachment 28245

Hey Bacon.

Whilst I agree it is frustrating I think the key lies in the extract from the email Tony sent.

• because we have run afoul of these obligations in the past and under previous management we ended up on an ASX watch list for repeated ramping announcement violations.

I have a mate who had a cray boat out here in the west (Very average fisherman ). On the many times I went out with him what was very clear was the fisherman of note (as my mate was) and those keen to be able to sell their fishing licence in the future were very cautious about getting a "black mark". This was mark issued by fisheries against the boat. This impact on this was economic as people were then aware that they had blown one of a very limited few chances. If you got caught breaching the rules again, expect to lose your licence or an expensive costly court case. Anyway there was always fisherman wanting to push the limits and those that don't.

At the end of the day you simply ask yourself this question. Did the fisherman who pushed the limits catch crays more per day than those that didn't. No, the best fisherman still caught the most crays, but the ones that abided by the rules slept better and had a higher certainty of achieving a higher price for their boat should they wish to sell out.

While BRN is not a fishing enterprise do we want the focus of our CEO and legal team diverted to arguing with the ASX over something that could be equally said in another forum. My answer is no.

I do agree that by making a song and dance about an announcement on the ASX may lift the share value initially, but it will then drop. Does this effect me as a LTH, no, as I am still accumulating. What this does is take the potential larger volatility (short term not long) out of the market and thus reduce the profits the shorters and traders are making.

I feel sorry for the mum and dad's traders out there, but ultimately ask yourself this. Do you want a company with a world leading product that will achieve greatness, but who under sells itself, or do you want a company with colorful announcements and promises that are the focus of the ASX after having a prior warning.

My thoughts anyway.

 

[wilzy123]

"we are adhering to the ASX Continuous Disclosure Guidelines and the Listing Rules" - Tony Dawe (today) on behalf of BrainChip.

What are you not getting?

 

[Diogenese]

Hi @Diogenese

1. What is the process to get from AKD1500 to AKD2000, given that it is now 'simply' optimising a taped out iteration? Is the hard work already done? Or is there significant engineering involved to incorporate LSTM/transformer functionality?
2. Based on 1. how difficult would it be to also release AKD2000 in 2023? Given that we have no clue how far PvdM has already advanced future AKD iterations

I'm still hoping we announce another BrainChip product release this year, but this one with more fanfare ie in conjunction with a Tier 1 partner or two

View attachment 28244

Hi tls,

I would love to be a fly on the wall at BrainChip labs. No, scrub that. I would love to be receiving reports from said fly.

Remember when we sent out the Akida 1000 engineering samples to EAPs?

When we got their feedback, CNN2SNN among other things was added to the chip, and the redesigned chip operated better than expected. Things like the physical layout and location of different functional elements (is the most data traffic taking the most efficient path, ... ) affect performance.

So I'm guessing there will be exhaustive in-house testing of the 1500 and then it will be field tested by selected EAPs.

It took an extra year or so to get the improved Akida 1000 out the door (CNN2SNN was a major overhaul), so my guess is that we would be lucky to see Akida 2000 this year.