BRN Discussion Ongoing
- Thread starter TechGirl
- Start date
buena suerte :-)
BOB Bank of Brainchip
"Unsubstantiated" = not supported or proven by evidence.
Pretty evident that we are linked to these companies Siemens/Synopsys/Cadence as advertised by BRN!! These dots were joined for us!!! No Ego's have been inflated with sharing this information ... Wishful, of course we are!! why wouldn't we be as it's just a snippet of positive news that we have all enjoyed sharing.
Nothing wrong with that
Last edited:
alwaysgreen
Top 20
Brainchip are working with Panasonic CONFIRMED!!!!!!
I kid, I kid.
My inference from this is that Akida is a great solution for any devices that need the battery to last for extended periods. The products will come. Most of them still haven't even been thought of because they weren't possible in the past.
Brainchip is on the path to greatness. It will take some time, but we will get there.
Dozzaman1977
Regular
Fact Finder
Top 20
Took the Chevy to the levee and the levee was fine,
Good old Brainchip was drinking whisky and wine, singing everything will come in good time…
Fact Finder
Top 20
It took thirty seconds but the answer is no not as good as an announcement unless you want to insider trade.Absolutely!! Robj.... normally we will just see the 'job description' but this actually mentions the Companies Wow!
- The role would include functional verification of the IP solution of Siemens/Synopsys/Cadence.
Was that as good as an Announcement !!??
But be careful it could be they have customers who currently use products from these companies who are quite tiny in comparison and are exploring alternatives.
My grandfatherly opinion only DYOR
FF
AKIDA BALLISTA
Frank Zappa
Regular
Thankyou
alwaysgreen
Top 20
Took the Chevy to the levee and the levee was fine,
Good old Brainchip was drinking whisky and wine, singing everything will come in good time…
When Don Maclean was aked "What does American Pie mean to you?" he answered, "It means I've never had to work a day in my life".
Hopefully our kids/grandkids will say the same when asked about Brainchip!
alwaysgreen
Top 20
Damo4
Regular
If it doesn't affect your investment style, as you rely on only verified info, what's the problem?
Spec stocks include a high degree of risk.
In this case some investors choose to take further risk, by speculating or dot joining.
If they choose to invest based on these factors, then that would be their investment style and not yours, which is ok.
The market prices in information known and a degree of speculation based on information not known.
$1B+ MC couldn't stand on its own if every investor was going from 4C to 4C waiting on the sales results to tell them the "success" of the company.
Whilst I agree that we may not know (ever) which companies specifically are using the IP, it's these links that could provide an edge to investors who don't just wait for ANN.
That is the risk these investors take.
Let's hope no NDAs were harmed during the making of this advertisement.
Fullmoonfever
Top 20
@Terroni2105
Wonderful pick up as others have said.
Personally, I found the locale interesting given it's through BRN Hyderabad and not one of our other offices.
This led me to thinking, is it actually more to do with Moschip now moving forward?
Is there a possible need, if working with Moschip, that we need to understand others IP and the interaction / integration with Akida into products?
Haven't dug too deep to see if Siemens connection with Moschip or via the other two and included as an overlap.
Wonderful pick up as others have said.
Personally, I found the locale interesting given it's through BRN Hyderabad and not one of our other offices.
This led me to thinking, is it actually more to do with Moschip now moving forward?
Is there a possible need, if working with Moschip, that we need to understand others IP and the interaction / integration with Akida into products?
Haven't dug too deep to see if Siemens connection with Moschip or via the other two and included as an overlap.
Dots are good. It's good to work out our path to future revenue, XRay. And the time to that revenue.
- Anns need to be made as soon as a material agreement for contracted future$ is signed (and not for month by month assistance to an eco-partner).
- 4C's don't discuss revenue but cash receipts/outgoings (eg is Siemens paying us or we paying them for development? (obviously we'll be paying for a staffer))
- the dots surrounding Siemens is illustrative. They are other companies that could speed up a final product to market (for yet other companies.)(ie more eco-system)
- I think this latest dot join is quite proper for us to explore as it gives us at least the feeling of progress, yet shows how complex the reality is, and avoids non-material announcements to eco-partners which would give us a false sense of security.
Putting all this together, good dot-joining gives us a higher degree of confidence that we may get an ann (maybe not till next year) telling us that we have jagged some client of Siemens, Cadence or Synopsis.
SERA2g
Founding Member
Put me down for 2 mate.
Bout time I introduced the fiancé to the cult.
BYO paddles for the hazing?
Bravo
If ARM was an arm, BRN would be its biceps💪!
Hot off the press.
Jon Fingas
·Reporter
Thu, 17 November 2022 at 10:00 am·2-min read
If companies are going to make augmented reality glasses you'd actually want to wear, they'll need chips that are powerful but won't require a large battery on your head. Qualcomm thinks it can help. The company has unveiled a Snapdragon AR2 Gen 1 platform that's built with slim AR glasses in mind. The multi-chip design reportedly delivers 2.5 times the AI performance of the company's XR2-based reference design while using half the power. You could have eyewear that intelligently detects objects in the room while remaining slim and light enough to use for hours at a time.
Part of the trick is to spread the computing load across the glasses' frame, Qualcomm says. The primary, 4nm-based AR processor includes a CPU, Tensor AI processing, graphics and engines for features like visual analytics. It can support up to nine simultaneous cameras for tracking both your body and the world around you. A co-processor elsewhere in the glasses includes an AI accelerator for tasks like eye tracking and computer vision, while a third chip handles connectivity to networks and phones. This not only better-balances the weight, but leads to smaller circuit boards and fewer wires than you'd see with a single do-it-all chip.
That networking is also important, Qualcomm says. Like Snapdragon 8 Gen 2 in phones, AR2 Gen 1 is one of the first platforms to support WiFi 7. That's crucial not just to provide the gobs of bandwidth for connecting to a handset (up to 5.8Gbps), but to reduce latency (under 2ms to your phone, according to Qualcomm). Combined with lag reduction in the processor and co-processor, you should have a more natural-feeling and responsive experience.
Hardware built on AR2 Gen 1 is in "various stages" of progress at multiple well-known companies, including Lenovo, LG, Nreal, Oppo and Xiaomi. Importantly, Microsoft had a hand in the platform requirements. Don't be surprised if you're one day using AR2 for virtual collaboration in Mesh, not to mention other Microsoft apps and services.
Qualcomm has also introduced meaningful updates to its audio technology. New S3 Gen 2 Sound and S5 Gen 2 Sound platforms promise to make the latest listening tech more commonplace, including spatial audio with head tracking, lower latency for games and the latest take on adaptive active noise cancellation (think of the transparency modes found on some earbuds). You won't see real-world products until the second half of 2023, but these chips could democratize features that were previously reserved for pricier buds and headphones.
https://au.finance.yahoo.com/news/cyber-attack-cost-medibank-35m-223335107.html
www.gsmarena.com
Qualcomm's new Snapdragon platform is built for slim augmented reality glasses
Jon Fingas
·Reporter
Thu, 17 November 2022 at 10:00 am·2-min read
If companies are going to make augmented reality glasses you'd actually want to wear, they'll need chips that are powerful but won't require a large battery on your head. Qualcomm thinks it can help. The company has unveiled a Snapdragon AR2 Gen 1 platform that's built with slim AR glasses in mind. The multi-chip design reportedly delivers 2.5 times the AI performance of the company's XR2-based reference design while using half the power. You could have eyewear that intelligently detects objects in the room while remaining slim and light enough to use for hours at a time.
Part of the trick is to spread the computing load across the glasses' frame, Qualcomm says. The primary, 4nm-based AR processor includes a CPU, Tensor AI processing, graphics and engines for features like visual analytics. It can support up to nine simultaneous cameras for tracking both your body and the world around you. A co-processor elsewhere in the glasses includes an AI accelerator for tasks like eye tracking and computer vision, while a third chip handles connectivity to networks and phones. This not only better-balances the weight, but leads to smaller circuit boards and fewer wires than you'd see with a single do-it-all chip.
That networking is also important, Qualcomm says. Like Snapdragon 8 Gen 2 in phones, AR2 Gen 1 is one of the first platforms to support WiFi 7. That's crucial not just to provide the gobs of bandwidth for connecting to a handset (up to 5.8Gbps), but to reduce latency (under 2ms to your phone, according to Qualcomm). Combined with lag reduction in the processor and co-processor, you should have a more natural-feeling and responsive experience.
Hardware built on AR2 Gen 1 is in "various stages" of progress at multiple well-known companies, including Lenovo, LG, Nreal, Oppo and Xiaomi. Importantly, Microsoft had a hand in the platform requirements. Don't be surprised if you're one day using AR2 for virtual collaboration in Mesh, not to mention other Microsoft apps and services.
Qualcomm has also introduced meaningful updates to its audio technology. New S3 Gen 2 Sound and S5 Gen 2 Sound platforms promise to make the latest listening tech more commonplace, including spatial audio with head tracking, lower latency for games and the latest take on adaptive active noise cancellation (think of the transparency modes found on some earbuds). You won't see real-world products until the second half of 2023, but these chips could democratize features that were previously reserved for pricier buds and headphones.
https://au.finance.yahoo.com/news/cyber-attack-cost-medibank-35m-223335107.html
Qualcomm unveils new Bluetooth LE Audio chips and platform for AR glasses
The Qualcomm S3 and S5 Gen 2 chips can handle lossless and low-latency audio. The AR2 Gen 1 is designed for thin and light AR glasses.
Last edited:
rgupta
Regular
There is an other dot joining here.
Mercedes is going to use snapdragon for its latest vehicles. And we all know Mercedes is going to use brainchip ip for its concept car EQXX.
Dyor
Bravo
If ARM was an arm, BRN would be its biceps💪!
This might seem like a silly question, but is there a chance there's an NDA in place between BrainChip and Nuvia?
This article says the Arm-compatible CPU cores that were designed in house by Qualcomm's acquired Nuvia team will be marketed under a new brand called Oryon. The components are now due to ship in products by the end of 2023 or early 2024.
It also states "Now Qualcomm executives have gone on stage, in a livestreamed keynote, and bragged how its Nuvia team has produced for the Snapdragon line "world-class" CPU cores that will take on the competition."
www.theregister.com
This article says the Arm-compatible CPU cores that were designed in house by Qualcomm's acquired Nuvia team will be marketed under a new brand called Oryon. The components are now due to ship in products by the end of 2023 or early 2024.
It also states "Now Qualcomm executives have gone on stage, in a livestreamed keynote, and bragged how its Nuvia team has produced for the Snapdragon line "world-class" CPU cores that will take on the competition."
Qualcomm teases custom Oryon CPU cores designed by Nuvia
Snapdragon giant flips off Softbank, promises processors within next two years
Bravo
If ARM was an arm, BRN would be its biceps💪!
SiFive and NASA! 
Extract
Extract
Fullmoonfever
Top 20
Posted elsewhere to expand on my thinking.
I would suggest either way it's cut, that there is a requirement to work with those companies respective IP and ours, whether direct or through someone like Moschip maybe.
If you have a look at the below definition you can see where verification IP (Siemens, Cadence, Synopsys IP solutions) is potentially being required.
Bottom line is the role needs to provide:
"functional verification of the IP solution of Siemens/Synopsys/Cadence.
Now why?
Has any/all of those companies integrated Akida (test / protype perhaps) and we need to provide the tech support (Akida side) to verify their overall solution works as intended?
They sure as hell wouldn't need us to verify their own stand alone IP solutions.
semiengineering.com
Verification IP (VIP)
A pre-packaged set of code used for verification.
DESCRIPTION
Verification IP (VIP) is a pre-packaged set of code used for verification. It may be a set of assertions for verifying a bus protocol, or it could be a module intended to be used within a defined verification methodology, such as UVM. This would often contain stimulus sequences, bus functional models, a set of checkers, coverage model and other things associated with a particular block in the design, such as a USB interface.
The main engine inside verification IP is the transactor model — sometimes called masters and slaves, sometimes just called VIPs, and in some flows called agents — that are the elements that can get told by a UVM, or whatever approach is being used, to write the test vectors.
VIP emerged as a form of reusable IP, which can be used to create the tests needed to shorten SoC verification time and increase coverage. While it is often used to verify standard bus protocols, it also can be used for system performance analysis and is increasingly being used with emulation, simulation, and virtual prototyping.
For example, VIP can be used with emulation for simulation acceleration and APIs. The simulation acceleration side uses emulation to run faster with a UVM test environment, very similar to the verification IP used with UVM, but not targeted to run on an emulator.
The API side of the VIP that is sitting in the testbench communicates between the two and uses transactions rather than low level signals. However, if a design is put onto the emulator and it is running in a UVM testbench mode, the speed of the emulator is limited because everything is moving back and forth at the signal level. Part of that signal level is still running in simulation so it’s going to throttle back the speed possible with emulation.
I would suggest either way it's cut, that there is a requirement to work with those companies respective IP and ours, whether direct or through someone like Moschip maybe.
If you have a look at the below definition you can see where verification IP (Siemens, Cadence, Synopsys IP solutions) is potentially being required.
Bottom line is the role needs to provide:
"functional verification of the IP solution of Siemens/Synopsys/Cadence.
Now why?
Has any/all of those companies integrated Akida (test / protype perhaps) and we need to provide the tech support (Akida side) to verify their overall solution works as intended?
They sure as hell wouldn't need us to verify their own stand alone IP solutions.
Verification IP (VIP)
Verification IP (VIP) is a pre-packaged set of code used for verification. It may be a set of assertions for verifying a bus protocol, or it could be a module... » read more
semiengineering.com
Verification IP (VIP)
A pre-packaged set of code used for verification.
DESCRIPTION
Verification IP (VIP) is a pre-packaged set of code used for verification. It may be a set of assertions for verifying a bus protocol, or it could be a module intended to be used within a defined verification methodology, such as UVM. This would often contain stimulus sequences, bus functional models, a set of checkers, coverage model and other things associated with a particular block in the design, such as a USB interface.
The main engine inside verification IP is the transactor model — sometimes called masters and slaves, sometimes just called VIPs, and in some flows called agents — that are the elements that can get told by a UVM, or whatever approach is being used, to write the test vectors.
VIP emerged as a form of reusable IP, which can be used to create the tests needed to shorten SoC verification time and increase coverage. While it is often used to verify standard bus protocols, it also can be used for system performance analysis and is increasingly being used with emulation, simulation, and virtual prototyping.
For example, VIP can be used with emulation for simulation acceleration and APIs. The simulation acceleration side uses emulation to run faster with a UVM test environment, very similar to the verification IP used with UVM, but not targeted to run on an emulator.
The API side of the VIP that is sitting in the testbench communicates between the two and uses transactions rather than low level signals. However, if a design is put onto the emulator and it is running in a UVM testbench mode, the speed of the emulator is limited because everything is moving back and forth at the signal level. Part of that signal level is still running in simulation so it’s going to throttle back the speed possible with emulation.
Last edited:
Getupthere
Regular
Similar threads
