Hi JD,
It is true that the configuration of Akida is field programmable as it has a programmable communication matrix interconnecting the nodes, but in my mind Akida is not FPGA-based. The initial proof-of-concept circuit was built in FPGA (Xylink, or was that BrainChip Accelerator?), but the commercial Akida 1 chip would be better described as an ASIC.
FPGA is field programmable gate array, a prefabricated chip with lots of different logic gates which the user can selectively interconnect to make a number of different circuits with for different purposes*. As a result there are many redundant logic gates and the layout is far from optimal. In the case of Akida, it would have been for fewer nodes than Akida 1, and it's performance would be inferior to an ASIC version of Akida. FPGAs are commonly used as test chips.
ASIC (application specific integrated circuit) is a purpose-built chip with only the necessary gates and in which the layout would be optimized by the circuit designer.
From the article you cited:
When we last spoke with BrainChip in 2018, the company was on the verge of rolling out its FPGA-based spiking neural network (SNN) accelerator, known as Akida (Greek for spike). At that point, the plan was to get its hardened SoC into the market by 2019.
The reference to "FPGA-based" was to the proof-of-concept chip. The "hardened SoC" is the ASIC. The use of the adjective "hardened" can be thought of as implying the FPGA design is malleable.
The presence of Zurich Uni as a partner would be put on the scales on the side of analog MemRistor SNNs, but this is not conclusive.
* On reflection, I had to put in the bit about different purposes to better distinguish Akida from my definition of a FPGA. Akida is a single purpose SNN with field programmable nodes and NPUs.