BRN Discussion Ongoing

Now that I have remembered Sandia here is a brief overview of what they published:

“Brain-based computing chips not just for AI anymore​

Date:March 10, 2022Source:DOE/Sandia National LaboratoriesSummary:With the insertion of a little math, researchers have shown that neuromorphic computers, which synthetically replicate the brain's logic, can solve more complex problems than those posed by artificial intelligence and may even earn a place in high-performance computing. Neuromorphic simulations employing random walks can track X-rays passing through bone and soft tissue, disease passing through a population, information flowing through social networks and the movements of financial markets”

Those who have been investors for some years will recall the former CEO Mr. Dinardo mentioning that Peter van der Made had flown to Europe to meet with interested parties in the Financial Industry. At the time we suggested that this was possibly due to the unique ability of AKIDA to recognise previously unseen repeating patterns - think inappropriate Bot trading outside approved parameters- however being able to do real math via Monte Carlo systems adds a huge number of options.

Moving away from the markets. Remember when Australia’s big 4 banks were caught out not reporting suspicious cash transactions to APRA that may have represented financial dealings of drug cartels, organised crime and terrorist groups these transactions were in the tens of thousands.

It did seem to me that had these transactions been reported in real time APRA would have been over whelmed in any event.

Brainchip stated in ASX released announcements and Annual Reports that it was working with the French Homeland Security Service.

What Security Service of either political colour would not want the ability to track financial transactions in real time across the World?

Recently I was very impressed with the speed at which the EU was able to identify and freeze Russian financial assets and directly and almost immediately target specific Russian citizens they deemed to be appropriate targets.

I am not saying that AKIDA is involved but if it was it would be something kept very, very secret in any event.

No opinion just speculation.
FF

AKIDA BALLISTA
This is the link to the full paper.
 
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Taproot

Regular
View attachment 4323

Brembo has a couple of customers.
Yes, that's the exciting thing. Absolute world leaders in Braking systems.
If Brembo are using Akida to run Sensify, that's HUGE.


SENSIFY™ comes from the merge of two words: SENSE that is a faculty by which a human perceives an external signal, stimulus and SIMPLIFY which means simplicity in installing at best the product in harmony with the vehicle.

Hence, SENSIFY™ constantly delivers the best of two worlds: driving pleasure and total safety. It is intuitive, responsive and smooth; it delivers the driver the expected performance when needed, combined with exceptional control.

SENSIFY™ has evolved naturally from Brembo’s heritage and know-how. It combines the design of the best braking components with the integration of a digital brain and sensors that control each wheel independently. The result is more precise car handling, increased performance and confidence: a unique driving experience.

SENSIFY™ is also a more sustainable braking solution. Thanks to the optimized braking action on each wheel combined with the absence of drag between pads and discs, emissions are minimized.

Furthermore SENSIFY™ opens up opportunities in car design, offering great flexibility for car makers and simplifying integration in any electric and internal combustion engine platform – from super sport to city car and, potentially, to the latest commercial vehicles.

SENSIFY™ is expected to be on the market from beginning 2024.
 
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For those of us that were late to catch the bus we are grateful for reflective posts like this.
Thank you FF
Hi Boab
Pleased you found it helpful.

You probably noticed I refer back to the Anil Mankar's live presentation to an audience at the 2021 Ai Field Day quite often in other posts. This presentation is available on the Brainchip website under Learn.

On the place we do not talk about @IndepthDiver produced a transcript of the presentation and I am not sure if it has been brought over here but relevantly to the question of whether AKIDA is powering Valeo's LiDAR being used by Mercedes is the following extract which you may not have yet discovered:

Audience Question: Are there any car manufacturers using your chips today?

Anil: They are evaluating technologies, we are developing some LiDAR data set applications for them, they will probably, they may not use this current chip because this current chip is not ASIL compatible and things like that but we expect that they will, once they are happy with our network that we are working with them they might ask us or they might ask one of their suppliers to develop a car certified ASIL certification and if we expect it to be embedded into the chip that are already going into the car, there are lots of companies selling camera chips in the car, there is no reason why they can't take our IP and it all ASIL compatible and all that but this current chip that we are developing to assist 28 nanometre is not certified for that but they are using this or testing all the network evaluating power performance and once they are happy we expect then, either them or their vendors, to be an IP customer for us.

Audience: Okay so your in development now but your not yet certified, is there a roadmap for that certification? Can you even ballpark a date or you don't want to talk about it?

Anil: Actually we don't have plans to be, the customers we are working with are already ASIL certified to in a car like camera chip guys, ultrasound, LiDAR guys, so we'll depend on them to because automotive certification all that will be long process and were not trying to be a big manufacturer of IC's our focus is to enable Ai into all of the application by supplying the IP.

Then further on Anil returns to LiDAR stating: Today people are taking LiDAR data and converting it into a 2D kind of image because its much easier to process the image and detect the object, There is no reason why we can't do that directly in a 3D point cloud and take advantage of that. We are working on some of those application and also there are other sensors that send 3D point cloud points and thats actually one of the application that we have, is, later on coming in but because its neuromorphic and because its so small and it reacts to the pixel where the things are changing."


Putting these comments together with everything else we know about Valeo this is why myself and many others have considerable confidence that AKIDA technology is at the core of their revolutionary LiDAR for Level 3 and above autonomous driving announced as being used by Mercedes Benz.

My opinion only DYOR
FF

AKIDA BALLISTA
 
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The following link takes you to a recently released research paper where they have shown you can diagnose Parkinson Disease from the
scent on a persons skin. All you need is the sensor and a processor - enter stage left AKD1000 to audition:


My opinion only DYOR
FF

AKIDA BALLISTA
 
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Boab

I wish I could paint like Vincent
Hi Boab
Pleased you found it helpful.

You probably noticed I refer back to the Anil Mankar's live presentation to an audience at the 2021 Ai Field Day quite often in other posts. This presentation is available on the Brainchip website under Learn.

On the place we do not talk about @IndepthDiver produced a transcript of the presentation and I am not sure if it has been brought over here but relevantly to the question of whether AKIDA is powering Valeo's LiDAR being used by Mercedes is the following extract which you may not have yet discovered:

Audience Question: Are there any car manufacturers using your chips today?

Anil: They are evaluating technologies, we are developing some LiDAR data set applications for them, they will probably, they may not use this current chip because this current chip is not ASIL compatible and things like that but we expect that they will, once they are happy with our network that we are working with them they might ask us or they might ask one of their suppliers to develop a car certified ASIL certification and if we expect it to be embedded into the chip that are already going into the car, there are lots of companies selling camera chips in the car, there is no reason why they can't take our IP and it all ASIL compatible and all that but this current chip that we are developing to assist 28 nanometre is not certified for that but they are using this or testing all the network evaluating power performance and once they are happy we expect then, either them or their vendors, to be an IP customer for us.

Audience: Okay so your in development now but your not yet certified, is there a roadmap for that certification? Can you even ballpark a date or you don't want to talk about it?

Anil: Actually we don't have plans to be, the customers we are working with are already ASIL certified to in a car like camera chip guys, ultrasound, LiDAR guys, so we'll depend on them to because automotive certification all that will be long process and were not trying to be a big manufacturer of IC's our focus is to enable Ai into all of the application by supplying the IP.

Then further on Anil returns to LiDAR stating: Today people are taking LiDAR data and converting it into a 2D kind of image because its much easier to process the image and detect the object, There is no reason why we can't do that directly in a 3D point cloud and take advantage of that. We are working on some of those application and also there are other sensors that send 3D point cloud points and thats actually one of the application that we have, is, later on coming in but because its neuromorphic and because its so small and it reacts to the pixel where the things are changing."


Putting these comments together with everything else we know about Valeo this is why myself and many others have considerable confidence that AKIDA technology is at the core of their revolutionary LiDAR for Level 3 and above autonomous driving announced as being used by Mercedes Benz.

My opinion only DYOR
FF

AKIDA BALLISTA
Thank you once again FF.
Thinking of the LiDAR Level three and I think of Mercedes recent announcement of taking responsibility/liability if anything goes wrong whilst in "Pilot Drive". They must be confident although Pilot Drive can only be used under certain circumstances.
All very exciting.
 
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Gies

Regular
Hi LS

This is a short definition:

“Monte Carlo method, statistical method of understanding complex physical or mathematical systems by using randomly generated numbers as input into those systems to generate a range of solutions”’


Years ago at one of the AGM’s I asked the question of Peter van der Made ‘does when you say that AKIDA does not do maths does that mean AKIDA cannot do maths?’ Peter van der Made said ‘yes AKIDA can do maths’ and the CEO Mr. DiNardo interrupted and moved to another topic.

Recently it was announced by Sandia (Just remembered.Cannot presently recall the company but they work with Intel) that neuromorphic computing was able to do maths and more efficiently than Von Neumann computing.

The above reveal at TCS by Dr. Arijit Mukherjee one of Brainchip AKIDA’s greatest fans does not come as a surprise.

The reveal that NASA is exploring Quantum annealing with spiking neural networks and the complete silence from Brainchip after acknowledging my email speaks volumes.

I recently was in email discussion with someone from the company and they were telling me some publicly disclosed information then they pulled up saying why am I telling you this you know more about the company than I do.

Over time I have a series of acknowledged emails that have never been replied to with actual answers.

When I speak about a spider web of connections in my head they are in my opinion entirely real and many of these connections lead to far bigger things than simple low powered edge computing in home door bells.

These door bells are novelty items like sideshow prizes at the Royal Easter Show popular with the masses but just the shallow veneer covering the true significance of where AKIDA technology is being deployed.

The Edge is tactical to allow AKIDA technology to take root and flourish but like bamboo it will not be contained it will spread out and pop up on the other side of the metaphorical garden and keep popping up until it overshadows every other form of computing.

AKD2000,3000,4000 & 5000 will eventually consume Von Neumann.

But don’t tell anyone.

My opinion and speculation only
So DYOR
FF

AKIDA BALLISTA
Hi FF


This is a link to an interview with Ken. He is asked if Brainchip is doing something in quantum computing. That was right in the rose. He was very uncomfortable with that question.
 
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Potato

Regular
Can someone remind me the requirements would be to enter the ASX200?
 

Diogenese

Top 20
Hi Boab
Pleased you found it helpful.

You probably noticed I refer back to the Anil Mankar's live presentation to an audience at the 2021 Ai Field Day quite often in other posts. This presentation is available on the Brainchip website under Learn.

On the place we do not talk about @IndepthDiver produced a transcript of the presentation and I am not sure if it has been brought over here but relevantly to the question of whether AKIDA is powering Valeo's LiDAR being used by Mercedes is the following extract which you may not have yet discovered:

Audience Question: Are there any car manufacturers using your chips today?

Anil: They are evaluating technologies, we are developing some LiDAR data set applications for them, they will probably, they may not use this current chip because this current chip is not ASIL compatible and things like that but we expect that they will, once they are happy with our network that we are working with them they might ask us or they might ask one of their suppliers to develop a car certified ASIL certification and if we expect it to be embedded into the chip that are already going into the car, there are lots of companies selling camera chips in the car, there is no reason why they can't take our IP and it all ASIL compatible and all that but this current chip that we are developing to assist 28 nanometre is not certified for that but they are using this or testing all the network evaluating power performance and once they are happy we expect then, either them or their vendors, to be an IP customer for us.

Audience: Okay so your in development now but your not yet certified, is there a roadmap for that certification? Can you even ballpark a date or you don't want to talk about it?

Anil: Actually we don't have plans to be, the customers we are working with are already ASIL certified to in a car like camera chip guys, ultrasound, LiDAR guys, so we'll depend on them to because automotive certification all that will be long process and were not trying to be a big manufacturer of IC's our focus is to enable Ai into all of the application by supplying the IP.

Then further on Anil returns to LiDAR stating: Today people are taking LiDAR data and converting it into a 2D kind of image because its much easier to process the image and detect the object, There is no reason why we can't do that directly in a 3D point cloud and take advantage of that. We are working on some of those application and also there are other sensors that send 3D point cloud points and thats actually one of the application that we have, is, later on coming in but because its neuromorphic and because its so small and it reacts to the pixel where the things are changing."


Putting these comments together with everything else we know about Valeo this is why myself and many others have considerable confidence that AKIDA technology is at the core of their revolutionary LiDAR for Level 3 and above autonomous driving announced as being used by Mercedes Benz.

My opinion only DYOR
FF

AKIDA BALLISTA
Hi FF,

Thanks for the reminder of the 2021 AI Field Day videos with Anil. They are well worth reviewing.

The AI field Day 2021 was 27-28 May 2021. A lot of water under the bridge since then, and Akida is the better for it.

BrainChip Completes Testing Production Version of the Akida Chip
Latest iteration has been optimized for lower power consumption than the original engineering samples
Aliso Viejo, Calif. – 8 November, 2021
BrainChip Holdings Ltd (ASX: BRN), (OTCQX: BCHPY), a leading provider of ultra-low power, high-performance artificial intelligence technology and the world’s first commercial producer of neuromorphic AI chips, today confirmed that functionality and performance testing of the AKD1000 production chips has been completed, which showed better performance than the original engineering samples.

As part of the continued development of its Akida™ Neuromorphic System-on-Chip (NSoC), BrainChip tested a production version of its AKD1000 chip with several neural network applications, including object classification, keyword spotting and spiking neural networks. The improved performance and lower power consumption results were achieved through a better layout and some minor design changes to the design, which were recognized after previous testing of earlier engineering samples.

Well worth re-watching these videos (I always find Ray Lucchesi's questions elicit useful information):

https://brainchipinc.com/videos/ BrainChip: The Future is Bright 28 May 2021.
0:55 - Joshua Fidel - any car mfrs using your chip now - are evaluating lidar datasets for them. This chip not ASIL compatible - IP embedded into chip so car mfrs/component suppliers can do ASIL qualification.
2:40 Marc - defence contractors - yes neuromorphic -learn on-chip - NASA - MetaTF & chip
3:30 Demetrios Brinkmann - best applications - beneficial - image
14:40 - RL - USB chip - $49 to $69

https://brainchipinc.com/videos/ Making Edge AI Possible
@8:40 Ray Lucchesi - neuromorphic analog
10:30 - Mark - low power micro W to milli W
1615 RL - RL - same resolution convert to spikes. difference between frames DVS event domain - no matrix multiplication
https://brainchipinc.com/videos/ The BrainChip Advantage
@ 8:45: Ray Lucchesi -one and a half nodes (6 NPUs) can do key word spotting
@ 15:00: Ray Lucchesi asks about LSTM - Anil LSTM is coming next generation - - new neuron model I&F plus copy
17:30: MetaTF deep learning SNN - CNN2SNN

MetaTF simulator maps to Akida - will include LSTM - activity based quantization - 4-bit, 2-bit, 1-bit.

ASIL is ISO standard, so it's very comprehensive, but car makers and component suppliers will be fully aware of the requirements.

ISO ASIL
https://www.techdesignforums.com/pr...g-iso-26262-certification-with-asil-ready-ip/

Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.
Best practices in applying the ISO 26262 functional safety standard
ISO 26262 describes four automotive safety integrity levels (ASILs) – A, B, C and D – which in turn define the various processes that automotive development teams must use to meet the standard. One key task is to minimize a design’s susceptibility to random hardware failures by defining the functional requirements, using a rigorous development process and taking steps to ensure that safety features can mitigate those hardware failures. Design teams working to meet ISO 26262 standards must also systematically analyze the status of any component or system throughout the supply chain.

The ISO 26262 certification process must start from the very beginning of development process, and include multiple steps to complete the certification process, some of which are detailed below.
Failure mode effect and diagnosis analysis
A failure mode effect and diagnosis analysis (FMEDA) report is generated by development teams to provide all the information about their adherence to ISO 26262 from a functional safety perspective. The FMEDA report must be concurrently reviewed by design and verification engineers. Safety managers monitor the development process, milestones and product reviews to ensure that all the documentation and traceability requirements defined by ISO 26262 are completed throughout the SoC development flow, at both the IP and full-chip level.

ASIL ratings provide evidence of compliance, and define both design targets and a rating assessment at the end of the development flow. The ASIL ratings range from A, for the lowest integrity requirements, to D, for the highest integrity requirements. Let’s go through an example to illustrate a safety-critical product development flow.
Example of a development flow
Figure 1 shows a standard development flow for an IP or SoC. The core architecture and specification goes through RTL design and implementation, and is then verified and validated in hardware and software in the final prototypes.

Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.

1650010120413.png


Making this flow into one that complies with ISO 26262 means starting at the beginning, with the core architecture and specification definition, as shown in Figure 2. This assures the SoC or IP is designed to meet the required functional safety level.

1650010177162.png



Architects and designers write safety plans to help manage the execution of safety activities, as shown in Figure 3. Safety plans help verify that the development flow meets the safety goals, implements the safety features specified in the safety plan, and measures the impact of any possible product failures and the design’s reaction to those failures in terms of functional safety. These plans are also reviewed by a safety manager.

The entire process up to this point is documented and delivered as Work Products, which include key milestones, resources, and the various implementation processes needed to meet functional safety requirements.

1650010296567.png


FMEDA forms a critical part of the safety plan, providing a detailed report encompassing various steps and analysis, as shown in Figure 4. It must include a fault injection analysis for both permanent and transient faults, so their impact can be assessed. FMEDA also considers all the possible failure and distribution modes to understand how the product will behave if a failure occurs and what sort of diagnostics the product implements to identify and communicate such failures to the system.

The ISO 26262 standard also provides guidelines on how to implement safety features to counter various failure modes. It does this by looking at the possible failures, based on the SoC architecture. This failure assessments analysis also applies to IP that is integrated into the SoC. The various mitigation functions and their effectiveness, as recommended by the standard, are shown in Table 1.

Diagnostic TypeEffectiveness
HW RedundancyHigh – 99%
Configuration Register TestHigh – 99%
EDC* on MemoryHigh – 99%
Combination of Timeout monitoring, Frame Counter & information RedundancyHigh – 99%
Self-test supported by HardwareHigh – 99%
Multi-bit HW redundancyMedium – 90%
Timeout monitoringMedium – 90%
Frame CounterMedium – 90%
Information RedundancyMedium – 90%
Parity Bit – per WordLow – 60%
Table 1: Various mitigation functions and their effectiveness as defined by ISO 26262 (Source: Synopsys)

...

Additional automotive requirements

In addition to meeting ISO 26262 functional safety requirements, automotive SoC development teams and the rest of the supply chain must adhere to automotive reliability and quality requirements.

Any product, including IP, for an automotive application must meet the automotive reliability requirements defined by AEC-Q100. Automotive reliability is measured in terms of parts-per-million failure rates under various operating modes and at much higher temperatures than those used to test consumer products. For this reason, SoC and IP designers define temperature profiles which their products are designed and tested to meet, based on the target application. IP providers must make sure their IP meets the reliability targets of the application, which means exploring how a transistor or electromigration analysis might be affected by the defined temperature profile*. IP providers must work with foundries to ensure that any special automotive rules are applied to their design.


[* Our experience with radiation hardening will come in useful in automotive ASIL certification. Also Socionext/TSMC will be familiar with automotive requirements, as will Valeo, Mercedes, Renesas, MegaChip ... ]

Any product development in the automotive supply chain must also meet automotive quality management requirements. In addition to having quality manuals and compliance reports, developers also need to create a design failure mode and effect analysis report that says that the SoC and its components meet the automotive quality management requirements.

Conclusion

Designing automotive SoCs and supporting components such as semiconductor IP demands a parallel functional safety assurance process, rooted in a deep understanding of the requirements of ISO 26262, AEC-Q100 and subtle technical details such as the impact of various temperature profiles on the potential failure modes of an IP block. A safety manager is also necessary to keep the safety process on track, ensure the documentation is kept up to date, and to review safety plans for unexplored failure modes. The overall process should include design and verification engineers throughout.
 
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Diogenese

Top 20
Hi FF,

Thanks for the reminder of the 2021 AI Field Day videos with Anil. They are well worth reviewing.

The AI field Day 2021 was 27-28 May 2021. A lot of water under the bridge since then, and Akida is the better for it.

BrainChip Completes Testing Production Version of the Akida Chip
Latest iteration has been optimized for lower power consumption than the original engineering samples
Aliso Viejo, Calif. – 8 November, 2021
BrainChip Holdings Ltd (ASX: BRN), (OTCQX: BCHPY), a leading provider of ultra-low power, high-performance artificial intelligence technology and the world’s first commercial producer of neuromorphic AI chips, today confirmed that functionality and performance testing of the AKD1000 production chips has been completed, which showed better performance than the original engineering samples.

As part of the continued development of its Akida™ Neuromorphic System-on-Chip (NSoC), BrainChip tested a production version of its AKD1000 chip with several neural network applications, including object classification, keyword spotting and spiking neural networks. The improved performance and lower power consumption results were achieved through a better layout and some minor design changes to the design, which were recognized after previous testing of earlier engineering samples.

Well worth re-watching these videos (I always find Ray Lucchesi's questions elicit useful information):

https://brainchipinc.com/videos/ BrainChip: The Future is Bright 28 May 2021.
0:55 - Joshua Fidel - any car mfrs using your chip now - are evaluating lidar datasets for them. This chip not ASIL compatible - IP embedded into chip so car mfrs/component suppliers can do ASIL qualification.
2:40 Marc - defence contractors - yes neuromorphic -learn on-chip - NASA - MetaTF & chip
3:30 Demetrios Brinkmann - best applications - beneficial - image
14:40 - RL - USB chip - $49 to $69

https://brainchipinc.com/videos/ Making Edge AI Possible
@8:40 Ray Lucchesi - neuromorphic analog
10:30 - Mark - low power micro W to milli W
1615 RL - RL - same resolution convert to spikes. difference between frames DVS event domain - no matrix multiplication
https://brainchipinc.com/videos/ The BrainChip Advantage
@ 8:45: Ray Lucchesi -one and a half nodes (6 NPUs) can do key word spotting
@ 15:00: Ray Lucchesi asks about LSTM - Anil LSTM is coming next generation - - new neuron model I&F plus copy
17:30: MetaTF deep learning SNN - CNN2SNN

MetaTF simulator maps to Akida - will include LSTM - activity based quantization - 4-bit, 2-bit, 1-bit.

ASIL is ISO standard, so it's very comprehensive, but car makers and component suppliers will be fully aware of the requirements.

ISO ASIL
https://www.techdesignforums.com/pr...g-iso-26262-certification-with-asil-ready-ip/

Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.
Best practices in applying the ISO 26262 functional safety standard
ISO 26262 describes four automotive safety integrity levels (ASILs) – A, B, C and D – which in turn define the various processes that automotive development teams must use to meet the standard. One key task is to minimize a design’s susceptibility to random hardware failures by defining the functional requirements, using a rigorous development process and taking steps to ensure that safety features can mitigate those hardware failures. Design teams working to meet ISO 26262 standards must also systematically analyze the status of any component or system throughout the supply chain.

The ISO 26262 certification process must start from the very beginning of development process, and include multiple steps to complete the certification process, some of which are detailed below.
Failure mode effect and diagnosis analysis
A failure mode effect and diagnosis analysis (FMEDA) report is generated by development teams to provide all the information about their adherence to ISO 26262 from a functional safety perspective. The FMEDA report must be concurrently reviewed by design and verification engineers. Safety managers monitor the development process, milestones and product reviews to ensure that all the documentation and traceability requirements defined by ISO 26262 are completed throughout the SoC development flow, at both the IP and full-chip level.

ASIL ratings provide evidence of compliance, and define both design targets and a rating assessment at the end of the development flow. The ASIL ratings range from A, for the lowest integrity requirements, to D, for the highest integrity requirements. Let’s go through an example to illustrate a safety-critical product development flow.
Example of a development flow
Figure 1 shows a standard development flow for an IP or SoC. The core architecture and specification goes through RTL design and implementation, and is then verified and validated in hardware and software in the final prototypes.


Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.

View attachment 4329


Making this flow into one that complies with ISO 26262 means starting at the beginning, with the core architecture and specification definition, as shown in Figure 2. This assures the SoC or IP is designed to meet the required functional safety level.

View attachment 4330


Architects and designers write safety plans to help manage the execution of safety activities, as shown in Figure 3. Safety plans help verify that the development flow meets the safety goals, implements the safety features specified in the safety plan, and measures the impact of any possible product failures and the design’s reaction to those failures in terms of functional safety. These plans are also reviewed by a safety manager.

The entire process up to this point is documented and delivered as Work Products, which include key milestones, resources, and the various implementation processes needed to meet functional safety requirements.


View attachment 4331

FMEDA forms a critical part of the safety plan, providing a detailed report encompassing various steps and analysis, as shown in Figure 4. It must include a fault injection analysis for both permanent and transient faults, so their impact can be assessed. FMEDA also considers all the possible failure and distribution modes to understand how the product will behave if a failure occurs and what sort of diagnostics the product implements to identify and communicate such failures to the system.

The ISO 26262 standard also provides guidelines on how to implement safety features to counter various failure modes. It does this by looking at the possible failures, based on the SoC architecture. This failure assessments analysis also applies to IP that is integrated into the SoC. The various mitigation functions and their effectiveness, as recommended by the standard, are shown in Table 1.


Diagnostic TypeEffectiveness
HW RedundancyHigh – 99%
Configuration Register TestHigh – 99%
EDC* on MemoryHigh – 99%
Combination of Timeout monitoring, Frame Counter & information RedundancyHigh – 99%
Self-test supported by HardwareHigh – 99%
Multi-bit HW redundancyMedium – 90%
Timeout monitoringMedium – 90%
Frame CounterMedium – 90%
Information RedundancyMedium – 90%
Parity Bit – per WordLow – 60%
Table 1: Various mitigation functions and their effectiveness as defined by ISO 26262 (Source: Synopsys)

...


Additional automotive requirements

In addition to meeting ISO 26262 functional safety requirements, automotive SoC development teams and the rest of the supply chain must adhere to automotive reliability and quality requirements.

Any product, including IP, for an automotive application must meet the automotive reliability requirements defined by AEC-Q100. Automotive reliability is measured in terms of parts-per-million failure rates under various operating modes and at much higher temperatures than those used to test consumer products. For this reason, SoC and IP designers define temperature profiles which their products are designed and tested to meet, based on the target application. IP providers must make sure their IP meets the reliability targets of the application, which means exploring how a transistor or electromigration analysis might be affected by the defined temperature profile*. IP providers must work with foundries to ensure that any special automotive rules are applied to their design.


[* Our experience with radiation hardening will come in useful in automotive ASIL certification. Also Socionext/TSMC will be familiar with automotive requirements, as will Valeo, Mercedes, Renesas, MegaChip ... ]

Any product development in the automotive supply chain must also meet automotive quality management requirements. In addition to having quality manuals and compliance reports, developers also need to create a design failure mode and effect analysis report that says that the SoC and its components meet the automotive quality management requirements.

Conclusion

Designing automotive SoCs and supporting components such as semiconductor IP demands a parallel functional safety assurance process, rooted in a deep understanding of the requirements of ISO 26262, AEC-Q100 and subtle technical details such as the impact of various temperature profiles on the potential failure modes of an IP block. A safety manager is also necessary to keep the safety process on track, ensure the documentation is kept up to date, and to review safety plans for unexplored failure modes. The overall process should include design and verification engineers throughout.
... and let's not forget Anastasi interspersed with Anil from January 2022:

(99k views)
(Anastasi bought BRN at about 60 cents, so she may be biased)
 
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Mugen74

Regular
Anastasi- The Bonnie McMurray of the youtube tech scene!😉
 
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Sirod69

bavarian girl ;-)
don´t know a data from this side perhaps it is interessting??
 
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F

Filobeddo

Guest
It was released as a press release below. I have previously asked the company why similar press releases were not also non price sensitive announcements via the ASX without a response. Perhaps you could ask at the AGM as I do not have an answer:

logoheader_brainchip_2021-1024x576.png

Laguna Hills, Calif. – April 5, 2022 – BrainChip Holdings Ltd(ASX: BRN, OTCQX: BRCHF, ADR: BCHPY), the world’s first commercial producer of ultra-low power neuromorphic AI chips and IP, and SiFive, Inc., the founder and leader of RISC-V computing, have combined their respective technologies to offer chip designers optimized AI/ML compute at the edge.
BrainChip’s AkidaTM is a revolutionary advanced neural networking processor architecture that brings AI to the edge in a way that existing technologies are not capable, with high performance, ultra-low power, and on-chip learning. SiFive Intelligence™ solutions with their highly configurable multi-core, multi-cluster capable design, integrate software and hardware to accelerate AI/ML applications. The integration of BrainChip’s Akida technology and SiFive’s multi-core capable RISC-V processors will provide a highly efficient solution for integrated edge AI compute.
SiFive Intelligence™-based processors offer industry leading performance and efficiency for AI and ML workloads. The highly configurable multi-core, multi-cluster capable design has been optimized for the broadest range of applications requiring high-throughput, single-thread performance while under the tightest power and area constraints.
“Employing Akida, BrainChip’s specialized, differentiated AI engine, with high-performance RISC-V processors such as the SiFive Intelligence Series is a natural choice for companies looking to seamlessly integrate an optimized processor to dedicated ML accelerators that are a must for the demanding requirements of edge AI computing,” said Chris Jones, vice president, products at SiFive. “BrainChip is a valuable addition to our ecosystem portfolio”.
BrainChip’s first-to-market neuromorphic processor, Akida, mimics the human brain to analyze only essential sensor inputs at the point of acquisition, processing data with unparalleled efficiency, precision, and economy of energy. Keeping AI/ML local to the chip, independent of the cloud, also dramatically reduces latency while improving privacy and data security.
“We are pleased to partner with SiFive and have the opportunity to have our Akida technology integrated with their market-leading product offerings, creating an efficient combination for edge compute,” said Jerome Nadel, BrainChip CMO. “As we expand our ecosystem of portfolio partners, we want to be sure that these relationships are built on complementary technologies, enabling capabilities, and breadth of environments so that we can expand opportunities to as many potential customers as possible. Driving our technology into a SiFive-based subsystem is exactly the type of partnership that meets these goals.”
For additional information about the BrainChip, SiFive partnership contact sales@brainchip.com.

About BrainChip Holdings Ltd (ASX: BRN, OTCQX: BRCHF, ADR: BCHPY)​

BrainChip is a global technology company that is producing a groundbreaking neuromorphic processor that brings artificial intelligence to the edge in a way that is beyond the capabilities of other products. The chip is high performance, small, ultra-low power and enables a wide array of edge capabilities that include on-chip training, learning and inference. The event-based neural network processor is inspired by the spiking nature of the human brain and is implemented in an industry standard digital process. By mimicking brain processing BrainChip has pioneered a processing architecture, called Akida™, which is both scalable and flexible to address the requirements in edge devices. At the edge, sensor inputs are analyzed at the point of acquisition rather than through transmission via the cloud to a data center. Akida is designed to provide a complete ultra-low power and fast AI Edge Network for vision, audio, olfactory and smart transducer applications. The reduction in system latency provides faster response and a more power efficient system that can reduce the large carbon footprint of data centers.
Additional information is available at https://www.brainchipinc.com
Follow BrainChip on Twitter: https://www.twitter.com/BrainChip_inc
Follow BrainChip on LinkedIn: https://www.linkedin.com/company/7792006

About SiFive​

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms have enabled leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. For more information, please visit www.sifive.com.
Would really like to know why announcements posted on the Brainchip website don’t also end up as asx announcements. That has puzzled me for a while and personally I think not doing so is a mistake
 
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dippY22

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Does it feel like with the AGM almost upon us and the 1st quarter 2022 results also due soon, that we may also get an announcement of one or more exec's selling a few of their shares (perhaps for personal reasons,....although the "why" doesn't matter)? Well, .... I have that feeling.

Wasn't it about a year ago that PVDM jettisoned some of his shares which at the time sent the HC crowd into a feeding frenzy and there was a ton of hand wringing as a result? I was not mortified by his action and it certainly was his "right". However, it was a temporary distraction that long term holders had to endure and defend or justify to deaf, dumb and blind downrampers and like I say, drew a lot of negativity at the time, if I remember right.

If this kind of employee / executive selling (redeeming?) happens again as I suspect it may, I hope people don't get their undies in a bundle over it again. They will on HC. I hope we don't here. Just don't be shocked if and when it happens again. Regards, dippY
 
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miaeffect

Oat latte lover


Something to watch before bed time
tenor (5).gif
 
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stuart888

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Hi Boab
Pleased you found it helpful.

You probably noticed I refer back to the Anil Mankar's live presentation to an audience at the 2021 Ai Field Day quite often in other posts. This presentation is available on the Brainchip website under Learn.

On the place we do not talk about @IndepthDiver produced a transcript of the presentation and I am not sure if it has been brought over here but relevantly to the question of whether AKIDA is powering Valeo's LiDAR being used by Mercedes is the following extract which you may not have yet discovered:

Audience Question: Are there any car manufacturers using your chips today?

Anil: They are evaluating technologies, we are developing some LiDAR data set applications for them, they will probably, they may not use this current chip because this current chip is not ASIL compatible and things like that but we expect that they will, once they are happy with our network that we are working with them they might ask us or they might ask one of their suppliers to develop a car certified ASIL certification and if we expect it to be embedded into the chip that are already going into the car, there are lots of companies selling camera chips in the car, there is no reason why they can't take our IP and it all ASIL compatible and all that but this current chip that we are developing to assist 28 nanometre is not certified for that but they are using this or testing all the network evaluating power performance and once they are happy we expect then, either them or their vendors, to be an IP customer for us.

Audience: Okay so your in development now but your not yet certified, is there a roadmap for that certification? Can you even ballpark a date or you don't want to talk about it?

Anil: Actually we don't have plans to be, the customers we are working with are already ASIL certified to in a car like camera chip guys, ultrasound, LiDAR guys, so we'll depend on them to because automotive certification all that will be long process and were not trying to be a big manufacturer of IC's our focus is to enable Ai into all of the application by supplying the IP.

Then further on Anil returns to LiDAR stating: Today people are taking LiDAR data and converting it into a 2D kind of image because its much easier to process the image and detect the object, There is no reason why we can't do that directly in a 3D point cloud and take advantage of that. We are working on some of those application and also there are other sensors that send 3D point cloud points and thats actually one of the application that we have, is, later on coming in but because its neuromorphic and because its so small and it reacts to the pixel where the things are changing."


Putting these comments together with everything else we know about Valeo this is why myself and many others have considerable confidence that AKIDA technology is at the core of their revolutionary LiDAR for Level 3 and above autonomous driving announced as being used by Mercedes Benz.

My opinion only DYOR
FF

AKIDA BALLISTA
Anil mentions they can perform on "3D Point Clouds". 3D Point Clouds are for Lidar and 3D math, so that is great to hear Brainchip's spiking neural processing architecture can be a major Use Case for automotive safety. Computer Vision sensors feed the data to Akida, and spiking decisions are made. Fantastic!
Stuart (Tampa Florida)

https://info.vercator.com/blog/what-are-point-clouds-5-easy-facts-that-explain-point-clouds
 
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cosors

👀
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Slymeat

Move on, nothing to see.
don´t know a data from this side perhaps it is interessting??
Good find @Sirod69, it seems like you have found another Akida user for sure.

A VERY interesting use for Akida indeed. The eX3 project is concerned with developing exascale computers capable of performing a billion billion (10^18) floating-point operations per second. An area known as high performance computing (HPC).

I wouldn't have expected Akida to be used in this area, but from the article "HPC relies on an intricate interplay between thousands of sophisticated processing nodes, each with a large number of cores, deep memory hierarchies and equipped with accelerators, organized in complex communication topologies."

Maybe Akida helps in the area of coordinating the various other nodes?

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Slymeat

Move on, nothing to see.
I just heard on the news of a major radio station here about an emergency approval
in the US for a mobile Covid test. Is there an Akida involved? I'm on the road so it's hard for me to get to the bottom of it. Maybe it's meant that: https://people.com/health/fda-approves-the-first-test-for-covid-using-breath-samples/?amp=true
The product involved is InspectIR which is a decent size box - the size of carry-on luggage. It uses gas spectroscopy to analyze the sample and gives a result in 3 minutes. Testing needs to be performed by a qualified technician and followed by a PCR test if positive.

In a causal look around, I couldn't find any references to Akida nor neuromorphic processors.

Unfortunately it is not the Akida bearing NaNose diaNose device. But I do feel this paves the way for the same sort of treatment whenever NaNose pull their finger out and start seeking approval/marketing it. I'm afraid they are doing themselves a disservice by waiting until the diaNose analyses, what seems to be their aim of, every disease known to man. Which will be NEVER! They should jump on the Covid diagnostic band wagon and get their product known as InspectHr have just done. Unfortunately, as is often the case, being first to market trumps being the best.

With diaNose, every man and his dog can self test. They COULD be everywhere!! I see a usage where any doorman type role could carry one and ask for a breath sample as a condition of entry. Better still a device that samples the general air, in say a doorway, and alarms when one of the detectable contagious diseases are present--this could then be used to cause more rigorous individual testing. The uses are limitless. Let's hope if this happens, the device does use Akida.
 
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Hi FF,

Thanks for the reminder of the 2021 AI Field Day videos with Anil. They are well worth reviewing.

The AI field Day 2021 was 27-28 May 2021. A lot of water under the bridge since then, and Akida is the better for it.

BrainChip Completes Testing Production Version of the Akida Chip
Latest iteration has been optimized for lower power consumption than the original engineering samples
Aliso Viejo, Calif. – 8 November, 2021
BrainChip Holdings Ltd (ASX: BRN), (OTCQX: BCHPY), a leading provider of ultra-low power, high-performance artificial intelligence technology and the world’s first commercial producer of neuromorphic AI chips, today confirmed that functionality and performance testing of the AKD1000 production chips has been completed, which showed better performance than the original engineering samples.

As part of the continued development of its Akida™ Neuromorphic System-on-Chip (NSoC), BrainChip tested a production version of its AKD1000 chip with several neural network applications, including object classification, keyword spotting and spiking neural networks. The improved performance and lower power consumption results were achieved through a better layout and some minor design changes to the design, which were recognized after previous testing of earlier engineering samples.

Well worth re-watching these videos (I always find Ray Lucchesi's questions elicit useful information):

https://brainchipinc.com/videos/ BrainChip: The Future is Bright 28 May 2021.
0:55 - Joshua Fidel - any car mfrs using your chip now - are evaluating lidar datasets for them. This chip not ASIL compatible - IP embedded into chip so car mfrs/component suppliers can do ASIL qualification.
2:40 Marc - defence contractors - yes neuromorphic -learn on-chip - NASA - MetaTF & chip
3:30 Demetrios Brinkmann - best applications - beneficial - image
14:40 - RL - USB chip - $49 to $69

https://brainchipinc.com/videos/ Making Edge AI Possible
@8:40 Ray Lucchesi - neuromorphic analog
10:30 - Mark - low power micro W to milli W
1615 RL - RL - same resolution convert to spikes. difference between frames DVS event domain - no matrix multiplication
https://brainchipinc.com/videos/ The BrainChip Advantage
@ 8:45: Ray Lucchesi -one and a half nodes (6 NPUs) can do key word spotting
@ 15:00: Ray Lucchesi asks about LSTM - Anil LSTM is coming next generation - - new neuron model I&F plus copy
17:30: MetaTF deep learning SNN - CNN2SNN

MetaTF simulator maps to Akida - will include LSTM - activity based quantization - 4-bit, 2-bit, 1-bit.

ASIL is ISO standard, so it's very comprehensive, but car makers and component suppliers will be fully aware of the requirements.

ISO ASIL
https://www.techdesignforums.com/pr...g-iso-26262-certification-with-asil-ready-ip/

Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.
Best practices in applying the ISO 26262 functional safety standard
ISO 26262 describes four automotive safety integrity levels (ASILs) – A, B, C and D – which in turn define the various processes that automotive development teams must use to meet the standard. One key task is to minimize a design’s susceptibility to random hardware failures by defining the functional requirements, using a rigorous development process and taking steps to ensure that safety features can mitigate those hardware failures. Design teams working to meet ISO 26262 standards must also systematically analyze the status of any component or system throughout the supply chain.

The ISO 26262 certification process must start from the very beginning of development process, and include multiple steps to complete the certification process, some of which are detailed below.
Failure mode effect and diagnosis analysis
A failure mode effect and diagnosis analysis (FMEDA) report is generated by development teams to provide all the information about their adherence to ISO 26262 from a functional safety perspective. The FMEDA report must be concurrently reviewed by design and verification engineers. Safety managers monitor the development process, milestones and product reviews to ensure that all the documentation and traceability requirements defined by ISO 26262 are completed throughout the SoC development flow, at both the IP and full-chip level.

ASIL ratings provide evidence of compliance, and define both design targets and a rating assessment at the end of the development flow. The ASIL ratings range from A, for the lowest integrity requirements, to D, for the highest integrity requirements. Let’s go through an example to illustrate a safety-critical product development flow.
Example of a development flow
Figure 1 shows a standard development flow for an IP or SoC. The core architecture and specification goes through RTL design and implementation, and is then verified and validated in hardware and software in the final prototypes.

Since high-end ADAS SoCs are mainly used for safety-critical applications, they must meet the stringent requirements of the ISO 26262 functional safety standard, as must all the companies which supply components or semiconductor IP that go into the overall design.

View attachment 4329


Making this flow into one that complies with ISO 26262 means starting at the beginning, with the core architecture and specification definition, as shown in Figure 2. This assures the SoC or IP is designed to meet the required functional safety level.

View attachment 4330


Architects and designers write safety plans to help manage the execution of safety activities, as shown in Figure 3. Safety plans help verify that the development flow meets the safety goals, implements the safety features specified in the safety plan, and measures the impact of any possible product failures and the design’s reaction to those failures in terms of functional safety. These plans are also reviewed by a safety manager.

The entire process up to this point is documented and delivered as Work Products, which include key milestones, resources, and the various implementation processes needed to meet functional safety requirements.

View attachment 4331

FMEDA forms a critical part of the safety plan, providing a detailed report encompassing various steps and analysis, as shown in Figure 4. It must include a fault injection analysis for both permanent and transient faults, so their impact can be assessed. FMEDA also considers all the possible failure and distribution modes to understand how the product will behave if a failure occurs and what sort of diagnostics the product implements to identify and communicate such failures to the system.

The ISO 26262 standard also provides guidelines on how to implement safety features to counter various failure modes. It does this by looking at the possible failures, based on the SoC architecture. This failure assessments analysis also applies to IP that is integrated into the SoC. The various mitigation functions and their effectiveness, as recommended by the standard, are shown in Table 1.

Diagnostic TypeEffectiveness
HW RedundancyHigh – 99%
Configuration Register TestHigh – 99%
EDC* on MemoryHigh – 99%
Combination of Timeout monitoring, Frame Counter & information RedundancyHigh – 99%
Self-test supported by HardwareHigh – 99%
Multi-bit HW redundancyMedium – 90%
Timeout monitoringMedium – 90%
Frame CounterMedium – 90%
Information RedundancyMedium – 90%
Parity Bit – per WordLow – 60%
Table 1: Various mitigation functions and their effectiveness as defined by ISO 26262 (Source: Synopsys)

...

Additional automotive requirements

In addition to meeting ISO 26262 functional safety requirements, automotive SoC development teams and the rest of the supply chain must adhere to automotive reliability and quality requirements.

Any product, including IP, for an automotive application must meet the automotive reliability requirements defined by AEC-Q100. Automotive reliability is measured in terms of parts-per-million failure rates under various operating modes and at much higher temperatures than those used to test consumer products. For this reason, SoC and IP designers define temperature profiles which their products are designed and tested to meet, based on the target application. IP providers must make sure their IP meets the reliability targets of the application, which means exploring how a transistor or electromigration analysis might be affected by the defined temperature profile*. IP providers must work with foundries to ensure that any special automotive rules are applied to their design.


[* Our experience with radiation hardening will come in useful in automotive ASIL certification. Also Socionext/TSMC will be familiar with automotive requirements, as will Valeo, Mercedes, Renesas, MegaChip ... ]

Any product development in the automotive supply chain must also meet automotive quality management requirements. In addition to having quality manuals and compliance reports, developers also need to create a design failure mode and effect analysis report that says that the SoC and its components meet the automotive quality management requirements.

Conclusion

Designing automotive SoCs and supporting components such as semiconductor IP demands a parallel functional safety assurance process, rooted in a deep understanding of the requirements of ISO 26262, AEC-Q100 and subtle technical details such as the impact of various temperature profiles on the potential failure modes of an IP block. A safety manager is also necessary to keep the safety process on track, ensure the documentation is kept up to date, and to review safety plans for unexplored failure modes. The overall process should include design and verification engineers throughout.

 
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