BRN Discussion Ongoing

IloveLamp

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IloveLamp

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Ha ha keep dreaming for that IP signing numb nut
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I will xx 😘
 
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Diogenese

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My guess is 5 more IP deals. ARM/INTEL/QUALCOMM/SAMSUNG/INFINION

THEY ALONG WITH RENASAS AND MEGACHIPS will service the rest of the world.

#onecanonlydream
Has there been any more about Socionext in-cabin radar?


Automotive Custom SoC Technologies and Solutions (socionextus.com)


Automotive Custom SoC Technologies and Solutions
Featuring advanced technologies in automotive display, AI, and smart sensing

Socionext’s advanced custom solutions are designed to help OEMs and tier-one automakers achieve complete ownership of key differentiating technologies with an added competitive edge.

These custom SoCs enable a wide range of applications, including ADAS sensors, central computing, networking, in-cabin monitoring, satellite connectivity, and infotainment.

1706948967378.png

Design and Development:

High core count CPU subsystem development

Safety Island, System Management, and Secure Boot

High Performance interconnect (NIC/NOC)

ISP, GPU & NNA acceleration for power/performance optimization

High-speed interfaces for chip-to-chip communication

High-speed networking & peripheral interfaces

Integrated user hardware function for product differentiation

High bandwidth memory interfaces

Emulation & prototyping for reduced development time, early performance evaluation & early software development

The Socionext 60GHz RF CMOS sensor has features and capabilities to support multiple in-cabin uses, including seat occupancy monitoring, child presence detection, and theft prevention

Advanced AI Solutions for Automotive

Socionext has partnered with artificial intelligence provider BrainChip to develop optimized, intelligent sensor data solutions based on Brainchip’s Akida® processor IP.

BrainChip’s flexible AI processing fabric IP delivers neuromorphic, event-based computation, enabling ultimate performance while minimizing silicon footprint and power consumption. Sensor data can be analyzed in real-time with distributed, high-performance and low-power edge inferencing, resulting in improved response time and reduced energy consumption.
 
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JDelekto

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Watch the Financials and the new Partnership IP deals, don't stress day to day, Brainchip aren't signing another IP License deal in my opinion, Sean our CEO hasn't come close to 1 but however his partnership portfolio is second to none
While I don't think BrainChip will be signing many IP deals with OEMs, they may be signing IP deals with tier suppliers from the different industries that will use their technology. These are, of course, fewer in numbers than all of the other businesses that will use them.

These companies will usually be Tier 1 and OEM suppliers and have the capital and distribution channels to tape out the chips for those industries. That will take some time but should result in sales that cast a wide net for a broad revenue stream.

Any partnerships, such as that with VVDN, will need to get those chips from somewhere. The initial run that BrainChip did with TSMC has to run out sometime, and they have already shown they can fabricate silicon through either TSMC or Intel Foundries.

As I see it, the partnerships are two-fold. BrainChip's partnership with NVISO utilizes BrainChip's technology from a software level, providing visibility to the company and the capability of its tech. Partnerships with VVDN, while doing the same, also facilitate hardware sales, resulting in revenue based on BrainChip's IP.

BrainChip may or may not stand in the foreground of the companies that leverage its technology. In tech news, however, BrainChip is often listed alongside industry giants such as IBM and Intel. Not every phone, router, VR headset, or tablet boasts a "Qualcomm Inside" sticker. Nevertheless, Qualcomm is a well-known company, and people know why the industry chooses their SoCs.

I think that the applications of Akida are numerous and one day will be known for its capabilities, even though people may not necessarily be sure in which consumer devices it will be lurking.

While the SP might be far from its all-time highs, they are not letting that deter them from fulfilling Peter's vision, and I feel they are doing great work at making inroads in the industry while maintaining the level of trust their customers have come to expect. It may not be long before we taste those higher prices again.
 
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Frangipani

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Yang and USC will lead the center, which also includes researchers from UCLA, Duke University, the University of Texas-San Antonio, and the Rochester Institute of Technology. The entity is called the Center of Neuromorphic Computing and Extreme Environment, or CONCRETE.



And besides funding from the U.S. Air Force (we work with AFRL through ISL) and the involvement of the Brainchip University Accelerator Program member Rochester Institute of Technology, there is yet another intriguing connection:

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Remember this June 2023 This is our Mission podcast?


After introducing his guest, who also serves as the Executive Vice Dean at the USC Viterbi School of Engineering, Nandan Nayampally says “You know, we go back a long way … in fact, we had common alma maters.” (03:14 min)

Gaurav Sukatme:
From 25:32 min: “I think the partnership between industry and academia is crucial here to make progress.”

From 27:13 min: “You know, companies like yours, like Brainchip, what you are doing with the University Accelerator Program, I like very much - in fact, we’re looking into it, as you know, we’ll be having a phone [?] conversation about exploring that further. I think programs like that are unique and can really make the nexus between a leading company and academia sort of be tighter and be stronger.”

At the end of the podcast, Nandan Nayampally thanks his guest for sharing his insights and closes with the words “…and hopefully we’ll work together much closer soon.” (35:15 min)

Which makes Brainchip’s involvement in CONCRETE (Center of Neuromorphic Computing and Extreme Environment”), well, not concrete, but certainly more likely… 😊
 
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Diogenese

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And besides funding from the U.S. Air Force (we work with AFRL through ISL) and the involvement of the Brainchip University Accelerator Program member Rochester Institute of Technology, there is yet another intriguing connection:

View attachment 55845

View attachment 55846

Remember this June 2023 This is our Mission podcast?


After introducing his guest, who also serves as the Executive Vice Dean at the USC Viterbi School of Engineering, Nandan Nayampally says “You know, we go back a long way … in fact, we had common alma maters.” (03:14 min)

Gaurav Sukatme:
From 25:32 min: “I think the partnership between industry and academia is crucial here to make progress.”

From 27:13 min: “You know, companies like yours, like Brainchip, what you are doing with the University Accelerator Program, I like very much - in fact, we’re looking into it, as you know, we’ll be having a phone [?] conversation about exploring that further. I think programs like that are unique and can really make the nexus between a leading company and academia sort of be tighter and be stronger.”

At the end of the podcast, Nandan Nayampally thanks his guest for sharing his insights and closes with the words “…and hopefully we’ll work together much closer soon.” (35:15 min)

Which makes Brainchip’s involvement in CONCRETE (Center of Neuromorphic Computing and Extreme Environment”), well, not concrete, but certainly more likely… 😊
Hi Frangipani,

The connexion with Prof Sukhatme is very promising. A tie in with USC would be a real feather in BRN's cap. Let's hope that has been followed up.

On the other hand, it looks like Prof Yang has probably been deeply involved in AFRL's dabbling with ReRAM/MemRistor/compute-in-memory. I can see a role for ReRAM as RadHard storage/backup for mission-critical data and software, but I guess they are still working on manufacturing repeatability for analog compute-in-memory.
 
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Frangipani

Regular
Hi Frangipani,

The connexion with Prof Sukhatme is very promising. A tie in with USC would be a real feather in BRN's cap. Let's hope that has been followed up.

On the other hand, it looks like Prof Yang has probably been deeply involved in AFRL's dabbling with ReRAM/MemRistor/compute-in-memory. I can see a role for ReRAM as RadHard storage/backup for mission-critical data and software, but I guess they are still working on manufacturing repeatability for analog compute-in-memory.
Thank's for your explanation!

So to briefly sum it up:
USC = Unanimously Sought-after Connection
 
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Maybe maybe not, but it does look very promising.


Proposal Summary​

Proposal Information


Proposal Number:
23-1- H6.22-2282


Subtopic Title:
Deep Neural Net and Neuromorphic Processors for In-Space Autonomy and Cognition


Proposal Title:
Event-Based Sensing and Navigation Technologies (EBSNT)


Small Business Concern


Firm:

VisSidus Technologies, Inc.


Address:

590 Lipoa Parkway, Suite 224, Kihei, HI 96753


Phone:

(386) 868-2227

Principal Investigator:


Name:

Bogdan Udrea


E-mail:

bogdan.udrea@vissidus.com


Address:

590 Lipoa Pkwy, Ste 224, HI 96753 - 6911


Phone:

(206) 227-8075

Business Official:


Name:

Ms. Rachel Campbell


E-mail:

rachel.campbell@vissidus.com


Address:

601 Innovation Way, 32114 - 3865


Phone:

(206) 617-2445

Summary Details:


Estimated Technology Readiness Level (TRL) :
Begin: 2
End: 3





Technical Abstract (Limit 2000 characters):
The Event-Based Sensing and Navigation Technologies (EBSNT) project aims to develop, integrate, and test a perception and planning avionics suite and associated on-board software in response to NASA’s Subtopic “H6.22 Deep Neural Net and Neuromorphic Processors for In-Space Autonomy and Cognition” within the scope of “Neuromorphic Software for Cognition and Learning for Space Missions.” EBSNT forms the foundation of a Relative Pose Determination and Control Subsystem (RPDCS) integrated on board a Servicer Space Vehicle (SSV) that performs Rendezvous, Proximity Operations, and Docking (RPOD) with a Client SV (CSV). The RPDCS uses a hybrid architecture
of event-based sensors, interconnected Spiking Neural Networks (SNNs) and traditional sensors, actuators, and von Neumann computers that enables the SSV to autonomously i) determine the relative pose and pose rate, i.e., relative translation and rotation velocities, between the SSV and a goal feature on the CSV; ii) plan a relative trajectory that places the SSV at a commanded relative pose with respect to the specified feature of the CSV; iii) perform translation and attitude maneuvers to acquire and maintain the commanded relative pose; and iv) monitor the health status of the SSV and take appropriate action to ensure mission safety in case of SSV component and subsystem failure.




Potential NASA Applications (Limit 550 characters):
On-orbit Service, Assembly, and Manufacture missions and multi-spacecraft human and robotic solar system exploration mission.




Potential Non-NASA Applications (Limit 400 characters):
Derived technologies are applicable to aerial drone swarming and convoying with applications ranging from intelligence collection to urban air mobility to package delivery.
 
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I like this one also.



NASA SBIR 2021-II Solicitation​

Proposal Summary​

Proposal Information


Proposal Number:
21-2- S5.05-1293


Phase 1 Contract #:
80NSSC21C0356


Subtopic Title:
Fault Management Technologies


Proposal Title:
ARADISS: Adaptive Real-Time Anomaly Detection & Identification For Space Systems

Small Business Concern


Firm:

Global Technology Connection, Inc.


Address:

2839 Paces Ferry Road, Suite 1160, Atlanta, GA 30339


Phone:

(770) 803-3001

Principal Investigator:


Name:

Jesse Williams


E-mail:

jwilliams@globaltechinc.com


Address:

2839 Paces Ferry Road, Suite 1160, 30339 - 5770


Phone:

(770) 803-3001

Business Official:


Name:

Dr. Ash Thakker


E-mail:

admin@globaltechinc.com


Address:

2839 Paces Ferry Road, Suite 1160, GA 30339 - 5770


Phone:

(770) 803-3001

Summary Details:


Estimated Technology Readiness Level (TRL) :
Begin: 4
End: 7





Technical Abstract (Limit 2000 characters, approximately 200 words):
Space missions continue to increase in number, complexity, and time & cost constraints. To lead technological advancements and successfully execute these missions, NASA desires new & robust onboard automated fault management technologies that address the full range of hardware & software faults, are transparent & reusable across platforms. This will lead to reduced costs and improved autonomy, resilience, & mission qualityespecially in missions that cannot afford comprehensive fault management and have a higher mission risk tolerance.
Global Technology Connection, Inc., (GTC) proposes to automate generation of ARADISS (Adaptive Real-time Anomaly Detection and Identification for Space Systems) models tuned to any given system. Feasibility of this framework was successfully demonstrated in Phase I on multi-rotor UAVs, electric propulsion testbed, and a preliminary CubeSat dataset. In Phase II, GTC plans to use a CubeSat platform used on NASA missions to steer the development, evaluation, and hardware integration planning. ARADISS models include simple machine learning norm models to estimate system operational variables, and self-adapting anomaly detection and identification models. ARADISS framework is applicable to virtually all electrically powered systems. Independent one-one norm maps make this approach extremely reusable, transparent and explainable. ARADISS models can be rapidly adapted to any platform and are idealfor space platforms with limited processing power. Applicable future space mission platforms include NISAR, SWOT, Dragonfly, and SPHEREx.
GTC has received interest from several space technology firms, and has partnered with CubeSat OEM and a space systems integration for Phase II for rapid technology transition and space deployment in Phase III.
Aggressive commercialization activities are being carried out for technology transition to NASA and other commercial space applications.




Potential NASA Applications (Limit 1500 characters, approximately 150 words):
The US accounts for 74% of the global investment in space exploration. It is expected to grow to over $20B by 2027 from $14.6B in 2017. 63% of the planned 80 space missions over the next decade are government missions. NASA JPL missions that could potentially benefit from automated fault management technology are satellites, spacecraft, rovers/landers, and space instruments. Specific applicable missions are Polaris, NISAR, SWOT, and SPHEREx. Our tools are ideal for onboard implementation.




Potential Non-NASA Applications (Limit 1500 characters, approximately 150 words):
Several US companies like Lockheed Martin, Northrop Grumman, Planet Labs, SpaceX, and Argotec, Inc. are active in the development of spacecraft, satellites, & instruments, and UAV systems. Our novel fault management technology will enable faster development, testing, and deployment timelines, and also increase resilience. This will reduce the overall development, testing, and mission costs.
 
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Flenton

Regular
My guess is 5 more IP deals. ARM/INTEL/QUALCOMM/SAMSUNG/INFINION

THEY ALONG WITH RENASAS AND MEGACHIPS will service the rest of the world.

#onecanonlydream
I think you might be wrong and there will be no more IP deals signed. The reason is that I believe when Brainchip change business models they made partnerships their new way of signing IP deal. I think that the partnership include clauses which means a company like ARM has effectively aleady signed for the IP but because no upfront money was involved an ASX announcement was not necessary.
 
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brnmagic

Emerged
and this passage below from that post, IMO, is why MB stated they are seeking to sign another partnership in 2024 with ???? to progress development of MBoS with NVIDIA. Brainchip would fit the bill one would think.... I have everything crossed this is one of the sparks igniting the share price in 2024.

View attachment 55829

Here is the MB clip stating this: “later this year we will decide on a partner to further develop this technology.”
Good evening, isn't it that they will release the news coinciding with the 20th anniversary celebration? Ilovebrn
 
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I think you might be wrong and there will be no more IP deals signed. The reason is that I believe when Brainchip change business models they made partnerships their new way of signing IP deal. I think that the partnership include clauses which means a company like ARM has effectively aleady signed for the IP but because no upfront money was involved an ASX announcement was not necessary.
This is a great post, if ARM signed a IP License with us the shareprice would go out of control, sign a partnership and it's undercover with no noise, people want to bag me but blind Freddy can see on how Sean has changed the dynamics of the company's,
No Revenue atm and in a near recession over the past 2 years the company is fairly valued,
Until Revenue comes in.
Later this year apparently 2 rate cuts coming I see the company really hitting the ground in the Asx dollars shareprice value,
Davey boy signing off
 
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TECH

Regular
I think you might be wrong and there will be no more IP deals signed. The reason is that I believe when Brainchip change business models they made partnerships their new way of signing IP deal. I think that the partnership include clauses which means a company like ARM has effectively aleady signed for the IP but because no upfront money was involved an ASX announcement was not necessary.

So are you then implying that Brainchip's Executive have effectively signed over 50 IP deals hidden in clauses and because nothing material
can be justified at this point in time they are not legally required to lodge documents with the ASX.

I may be totally wrong here, but if the Board have instructed the CEO not to inform the shareholders of a change in business modelling, as
they have done previously, well are they then in fact breaking any disclosures that must be disclosed to the shareholders ?

At a recent delivery, Sean stated that the company hadn't changed their business model, and emphasized that we are first and foremost
an IP Company !

Very happy to be corrected, but I disagree with your logic....Tech.
 
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Bravo

If ARM was an arm, BRN would be its biceps💪!
What's everyone's thoughts on this? Our Chairman Mr Antonio Viana is also currently serving on the Board of Directors at Arteris. Other relevant background info is that Sam Altman (OpenAI) had committed to a $51 million investment in AI chips from Rain AI.

Rain AI are apparently bringing their first chip (analogue in-memory digital AI accelerator) to market at the end of this year.



Arteris Selected by Rain AI for Use in the Next Generation of AI​

Optimizing on-chip mesh connectivity with Arteris’ FlexNoC 5 physically aware network-on-chip enables Rain AI to realize faster data transfers at ultra-low power to achieve record performance for Generative AI and Edge AI computing at scale.
CAMPBELL, Calif. – January 30, 2024
– Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that Rain AI, an AI company building the world’s most cost and energy efficient hardware for AI, has selected Arteris’ FlexNoC 5 physically aware network-on-chip (NoC) IP. The company will utilize the Arteris interconnect IP for its AI accelerator family. The on-chip connectivity enabled by Arteris’ IP supports the design of an advanced mesh network topology for superior performance that helps support Rain AI’s digital in-memory compute for AI workloads.
The core of Rain AI’s endeavor lies in co-designing fundamental innovations across software, hardware, and algorithms to both speed up processing and lower power consumption. The mesh network-on-chip topology design for on-chip connectivity is a cutting-edge approach to solve the technical challenge of maintaining high performance while interconnecting various AI processing elements. Arteris’ FlexNoC 5, connecting a mesh topology for high-density AI computing, will enable Rain AI to achieve optimal performance at a lower cost of operation.
"The AI problem is an energy problem. Creating a future with abundant and scalable artificial intelligence is critical for the AI revolution," said William Passo, CEO of Rain AI. "The right NoC is critical for AI computing and Arteris FlexNoC 5 was an easy choice given its unmatched product performance including ultra-low power, lowest latency, and highest bandwidth, along with deep expert support and proven track record in reducing time to market."
Rain AI is on a mission to build the compute platform for the future of AI, including training and inference on the same platform to enable scale on-device AI. Utilizing the versatility of the RISC-V instruction set architecture (ISA) and the proven high-performance NoC IP from Arteris, Rain AI expects to deliver products that outperform GPUs and are radically more cost-effective.
"We are very excited to support Rain AI in their vision to transform AI compute through their novel approach to machine learning," stated K. Charles Janac, president and CEO of Arteris. "FlexNoC 5's ability to deliver high performance, flexibility and scalability was a great fit for Rain AI's approach to redefining compute for Generative AI and on-device AI applications."
Arteris remains steadfast in its commitment to delivering state-of-the-art system IP products, empowering innovators like Rain AI to achieve groundbreaking advancements in semiconductor technology. Learn more about FlexNoC 5 and solutions for AI at arteris.com.
About Arteris
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. Learn more at arteris.com.
About Rain AI
Rain AI is creating a future with abundant and scalable artificial intelligence. They’re building the world’s most cost and energy efficient hardware for AI. Their products achieve an order of magnitude improvement over the status quo by co-designing every layer of the AI stack.
Rain AI is currently a Series A stage startup and backed by world leaders in AI, including Sam Altman (OpenAI), Y Combinator, Daniel Gross, Jaan Tallinn, Founders X Fund, Airbus Ventures, and Grep VC. Learn more at rain.ai

 
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Kachoo

Regular
So are you then implying that Brainchip's Executive have effectively signed over 50 IP deals hidden in clauses and because nothing material
can be justified at this point in time they are not legally required to lodge documents with the ASX.

I may be totally wrong here, but if the Board have instructed the CEO not to inform the shareholders of a change in business modelling, as
they have done previously, well are they then in fact breaking any disclosures that must be disclosed to the shareholders ?

At a recent delivery, Sean stated that the company hadn't changed their business model, and emphasized that we are first and foremost
an IP Company !

Very happy to be corrected, but I disagree with your logic....Tech.
Hey Tech,

They could still plan to use the IP model its just that the deal or partnership joins closer to the product completion.

Example Onsemi.

They collaborate on the airbag product and have a design once the design is a win and there are customers wanting the product then a deal is struct. Be it IP or chip sale direct depending on quantity.

This removes risk for Onsemi to pay up front to play. And being a partnership the engineering fees are a savings. Maybe BRN royalty would be abit higher on the back end.

Its pretty clear they are busy but money has not started to flow.

But the IP plan still is ongoing so no need to tell us much. Imo
 
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TheFunkMachine

seeds have the potential to become trees.
I think you might be wrong and there will be no more IP deals signed. The reason is that I believe when Brainchip change business models they made partnerships their new way of signing IP deal. I think that the partnership include clauses which means a company like ARM has effectively aleady signed for the IP but because no upfront money was involved an ASX announcement was not necessary.
I don’t look at it this way. The way I understand it is that the customers of brainchip that will directly sell SOC containing Akida to other customers needs the IP.

Renasas bought IP because they develop MOUs to the car industries, they want to create a product(MOU or AI type offering) to sell to their existing customer base. However, someone like Mercedes is not intending to sell a chip containing Akida to other parties so they don’t have to be a direct customer, signing a contract with Brainchip to get a product containing Akida. They can go to vendors and foundries that have the ability to create a chip that contains Akida for their purpose. In this case the only way we will gauge progress is trough revenue (royalties).

So most of the current partnerships are intending to use Akida in a product and it is a way to get access to the technology, the expertise of brainchip staff and engineers working on their product before having to pay for anything, however when the time comes that they are confident in their new product containing Akida, most of them will not sign IP, rather approach direct customers of Brianchip that can tailor make a SOC/MOU solution for their use case.

So Brainchip don’t need a lot of customers, they only need a few big once like I talked about in my post above that will then sell on to the likes of Apple/Nvidia/Tesla/Dell/Tata etc.

So to conclude my theory based on my understanding is that Partnerships will integrate Akida into product, but not trough brainchip directly, but trough the likes of Renasas and Megachips and a handful of other Chip makers that I believe Brainchip is trying g to get across the line.


If this is the case it should not be too hard to figure out who the handful of other potential IP contracts that Brainchip is chasing. It is the once that currently supply chips to the partnerships brainchip is working with.
 
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Diogenese

Top 20
I don’t look at it this way. The way I understand it is that the costumers of brainchip that will directly sell SOC containing Akida to other costumers needs the IP.

Renasas bought IP because they develop MOUs to the car industries, they want to create a product(MOU or AI type offering) to sell to their existing costumer base. However, someone like Mercedes is not intending to sell a chip containing Akida to other parties so they don’t have to be a direct costumer, signing a contract with Brainchip to get a product containing Akida. They can go to vendors and foundries that have the ability to create a chip that contains Akida for their purpose. In this case the only way we will gauge progress is trough revenue (royalties).

So most of the current partnerships are intending to use Akida in a product and it is a way to get access to the technology, the expertise of brainchip staff and engineers working on their product before having to pay for anything, however when the time comes that they are confident in their new product containing Akida, most of them will not sign IP, rather approach direct costumers of Brianchip that can tailor make a SOC/MOU solution for their use case.

So Brainchip don’t need a lot of costumers, they only need a few big once like I talked about in my post above that will then sell on to the likes of Apple/Nvidia/Tesla/Dell/Tata etc.

So to conclude my theory based on my understanding is that Partnerships will integrate Akida into product, but not trough brainchip directly, but trough the likes of Renasas and Megachips and a handful of other Chip makers that I believe Brainchip is trying g to get across the line.


If this is the case it should not be too hard to figure out who the handful of other potential IP contracts that Brainchip is chasing. It is the once that currently supply chips to the partnerships brainchip is working with.
Hi TFM,

The thing which distinguishes partnerships is that they involve some degree of product co-development.

At this early stage of commercialization, almost exactly none of our partners or customers will have in-house engineering expertise and familiarity with NN, let alone Akida digital SNN.

The first engineering graduates who have met Akida will only just be emerging.

Contrast this with ARM, where every man and his dog (in the processor field) will be familiar with the implementation of ARM processors.

So I think we will gradually be able to ramp up the straight licensing model as familiarity with the ins-and-outs of Akida become more widely known.

https://www.bing.com/videos/rivervi...FA781B616AD01248D7C9FA781B616AD012&ajaxhist=0
 
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That's a whole lot of highlighting there Genie 😛
But all that kind of babble, is the talk of the Town these days..

While I personally don't doubt at all, that we have a relationship with Bosch and Continental, in fact we seem to have a strong connection with many German Company's.
(The above is largely my speculation).

Whether or not they actually bear fruit, remains to be seen.

I still don't think Mercedes is a "Sure Thing" but we've covered a couple of bases there and third base, is achievable..

Mercedes, would be Golden, because it's such a marque brand, but to misquote LDN..
"Frankly, I don't think we need Mercedes".
 
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