BRN Discussion Ongoing

[Diogenese]

Hi frangipani,

I would suggest WSU do know PVDM have been experimenting (minimum) with Akida a while back. Refer to previous post(s) I provided in TSE a while back

Cheers
The Pope

Playing the old infallibility card now, your holiness?

 

[HopalongPetrovski]

 

[The Pope]

Playing the old infallibility card now, your holiness?

You are funny Dio. The links to PVDM and WSU have been there for a while now.
Refer to a previous post by me below and others on TSE were trying to cross link at the time linked to presentation done by a lecture at WSU denying knowledge to Whitehorse on not knowing any thing on BRN but there is previous evidence to suggest the opposite. Leave it at that. Hope you have a great weekend.

BRN Discussion Ongoing

Hi @Diogenese I have just been to HC and I am pleased to report back that your cunning plan has worked @alwaysgreen was under your mind control inspired to post about the Brainchip ARM partnership. Impressive work. Take care everyone superior engineering intellect at work here. 😂🤡🤣 My opinion...

thestockexchange.com.au

Edit- when you read the attachments it may link with other things like event based cameras etc but hey what would I know Dio. Lmfao

Cheers
The Pope

 

[Boab]

SP finished up 4c from last Friday's close of 17c.
Me no complain.
Heading off to a trade function overlooking the Swan river in East Fremantle.
I'm gonna really enjoy the beers today.
Cheers

 

[mrgds]

Guess we gotta be happy with almost 20% gain this week.................................
The "unexpected rally " on Wednesday has probably given BRN greater exposure to a wider audience ........................

I always enjoy listening to Zach Shelby speak, and am very happy we are partnered with Edge Impulse ..........................

Considering the Shareholder Q&A Podcast has been delayed til next week, due to "scheduling issues " (whaaaat? ....... ) im
very much looking forward to that ..........................................................................................................................................................................

AND, NOW WHAT YOU HAVE ALL BEEN WAITING FOR , ................................................................................................

GREY BABY YEAH, ........................................

 

[buena suerte :-)]

Guess we gotta be happy with almost 20% gain this week.................................
The "unexpected rally " on Wednesday has probably given BRN greater exposure to a wider audience ........................

I always enjoy listening to Zach Shelby speak, and am very happy we are partnered with Edge Impulse ..........................

Considering the Shareholder Q&A Podcast has been delayed til next week, due to "scheduling issues " (whaaaat? ....... ) im
very much looking forward to that ..........................................................................................................................................................................

AND, NOW WHAT YOU HAVE ALL BEEN WAITING FOR , ................................................................................................

GREY BABY YEAH, ........................................
View attachment 49226

Green for the week though?

 

[M_C]

Guess we gotta be happy with almost 20% gain this week.................................
The "unexpected rally " on Wednesday has probably given BRN greater exposure to a wider audience ........................

I always enjoy listening to Zach Shelby speak, and am very happy we are partnered with Edge Impulse ..........................

Considering the Shareholder Q&A Podcast has been delayed til next week, due to "scheduling issues " (whaaaat? ....... ) im
very much looking forward to that ..........................................................................................................................................................................

AND, NOW WHAT YOU HAVE ALL BEEN WAITING FOR , ................................................................................................

GREY BABY YEAH, ........................................
View attachment 49226

Loved the amount of time they spent talking about NVIDIA in the podcast also..................

I'm sure they had their reasons

 

[Vladsblood]

Hopfully some FOMO will be kicking in from not knowing what next week may or will bring in !!!

With you on that X-ray. Held up pretty good for a Friday close…a good omen for nxt week imo. Vlad

 

[CHIPS]

Funnily, it also happens to be 1 day before 11/11…

(at least in the time zones of the majority of forum members)

And on 11.11. starts the Karneval season 2024 in Germany

 

[buena suerte :-)]

SP finished up 4c from last Friday's close of 17c.
Me no complain.
Heading off to a trade function overlooking the Swan river in East Fremantle.
I'm gonna really enjoy the beers today.
Cheers

Enjoy…Cheers Boab

 

[Diogenese]

Loved the amount of time they spent talking about NVIDIA in the podcast also..................

I'm sure they had their reasons

In Sean's recent podcast, he mentioned that 8 bits had been added to Akida 2 as a customer request, so at least one of our NDA/EAPs wishes to have 8-bit.

8-bit gives us access to Nvidia models, so is there a link to somebody wishing to be able to run Nvidia models on Akida 2.

Obviously Nvidia has a far larger array of models compared to Brainchip's library and the generation of models is very time consuming, so access to Nvidia's models greatly expands the potential use cases for Akida 2.

 

[Makeme 2020]

In Sean's recent podcast, he mentioned that 8 bits had been added to Akida 2 as a customer request, so at least one of our NDA/EAPs wishes to have 8-bit.

8-bit gives us access to Nvidia models, so is there a link to somebody wishing to be able to run Nvidia models on Akida 2.

Obviously Nvidia has a far larger array of models compared to Brainchip's library and the generation of models is very time consuming, so access to Nvidia's models greatly expands the potential use cases for Akida 2.

Talk is cheap.
When are we going to see this so called Explosion in sales.
What happened to Renesas and Megachips.
I can't wait for 2030

 

[Esq.111]

Evening Chippers ,Diogenese ,

My understanding, several months ago ...or may well be over a year or more ago now the big end of town got together and decided 8 bits was the bees knees. This was after Chip clearly demonstrated proficiency in 2 bit ,4 bit & 8 bit

Almost as though BrainChip has eloquently , flipped them the bird , so to speak and joined them at their own game.

Just my very loose take on things & don't even ask me what a bit is , but if that's the game thay wish to play than we can achieve the same proficiency if not better , if so be.

AKIDO BALISTA.

Regards,
Esq.

 

[IloveLamp]

In Sean's recent podcast, he mentioned that 8 bits had been added to Akida 2 as a customer request, so at least one of our NDA/EAPs wishes to have 8-bit.

8-bit gives us access to Nvidia models, so is there a link to somebody wishing to be able to run Nvidia models on Akida 2.

Obviously Nvidia has a far larger array of models compared to Brainchip's library and the generation of models is very time consuming, so access to Nvidia's models greatly expands the potential use cases for Akida 2.

NVIDIA at Supercomputing 2023

Join Us Online. November 12–17, 2023

www.nvidia.com

 

[Xhosa12345]

I have nfi , just so perplexed i guess.

 

[cosors]

Funnily, it also happens to be 1 day before 11/11…

(at least in the time zones of the majority of forum members)

My city is in full preparation.
For the others: tomorrow marks the start of the fool's season here, which doesn't end until carnival next year. And tomorrow (11.11. here) at 11am it starts and a whole region gets collectively drunk. Well, there are also many who take it very seriously and only drink moderately. In any case, carnival starts here tomorrow and a few thousand fools will be frolicking through the city.

 

[Tothemoon24]

MCUs: The Microelectronic Heartbeat of the Car, Running on Arm​

The demand for automotive microcontrollers (MCUs) is accelerating across today's modern vehicles, with this technology being built on Arm.
By Dipti Vachani, SVP and GM of the Automotive Line of Business, Arm
AutomotiveCompany NewsSoftware
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If you’ve seen me speak at an industry event lately, you’ll know I’m passionate about how trends like increasing automation, electrification and the rise of software-defined vehicles (SDVs) are leading the automotive industry to completely reinvent itself. This evolution is driving a huge influx of electronics and semiconductors into the vehicle and, in many cases, a complete rethink of the role of technology in the vehicle and the electrical architectures needed to support it. Central to this transition are the Electronic Control Units (ECUs) and microcontrollers (MCUs) that are the heartbeat of the modern vehicle and fundamental to the majority of operations that make it run safely.
Individual ECUs (of which there are many in a vehicle) control one or more of the electrical systems or subsystems within the vehicle, such as powertrain, engine, brakes, body or suspension control. Meanwhile, MCUs support single function operations within these ECUs, such as sensors or motor actuation, making them vital to the day-to-day running of the vehicle. Some modern vehicles use more than 100 MCUs. Put simply, without MCUs these vehicle functions that we need for an enjoyable and safe driving experience could not exist.

Doubling down on our MCU investment​

This is exactly why Arm has a long history of significant investment into our Cortex-M and Cortex-R lines of products that power automotive MCUs. We continue to develop a broad MCU product portfolio that leverages our heritage in efficient, low-power computing across all performance points, from the tiniest sensors to higher performance ECUs, giving our automotive partners and supporting ecosystem the ability to reuse software across Arm-based MCUs. On top of this, we are adding more safety features throughout our Cortex-M line-up and supporting software that benefits the vehicle and wider ecosystem.
Both Cortex-M and Cortex-R product roadmaps are essential to the Arm business and are being driven by the automotive industry embracing the need for many more capable MCUs across vehicles. In fact, according to Strategy Analytics, between now and 2026, the number of MCUs is set to rise by 8 percent outpacing the growth in vehicle production.

A committed ecosystem​

Our automotive silicon partners are taking notice. Recent product development announcements from industry-leaders in automotive MCUs, NXPand Renesas, not only highlight the vital role of MCUs within vehicles, but also the importance of Arm technology, such as our Cortex-M family, in delivering the compute capabilities needed for a new era of advanced automotive MCUs.

NXP​

Working closely with NXP, we have been able to leverage the full potential of Arm automotive processors across its entire S32 vehicle compute platform, with its new S32M2 motor control solution being no exception. This is helping to deliver advanced power efficiency and safety capabilities for a broad range of single vehicle functions, while also benefiting from Arm’s extensive software ecosystem.

Renesas​

Meanwhile, Renesas unveiled a roadmap for the fifth generation of its R-Car family of chips, including two new Arm-based MCU product lines providing solutions that meet high computing performance and real-time processing requirements of the future automotive market. These new product additions signal Renesas’ commitment to supporting market demands and making Arm-based products available to its customers.

Automotive MCU momentum​

These recent announcements are part of wider momentum for the adoption of Arm technologies across automotive MCUs. In my talks with a wide range of automotive partners, we know that Arm is the MCU technology of choice due to the common architecture, power efficient compute, functional safety, advanced security, software compatibility, scalability, and broad ecosystem of support.
A common architecture: Through 30 years of working with the automotive industry, Arm has a diverse and scalable portfolio of compute cores for a variety of automotive applications. This provides a common architecture that means designers and developers benefit from scalable hardware and the ability to re-use software, saving engineering time and costs and allowing them to focus on what really matters – product differentiation.
Seamless software: The sheer scale of the Arm architecture, with more than 250 billion Arm-based chips shipped to date, is motivating software providers to add Arm support for cost-effective and seamless software deployment of applications. This is timely as we look ahead to the rise of SDVs and over-the-air (OTA) software updates adding more features to the vehicle.
Safety that scales: The Cortex-M and Cortex-R lines of products bring safety capabilities across all performance points for MCUs, enabling our partners to develop different safety features and solutions that scale. Support from our leading ecosystem then provides a range of software and tools for future safety developments.
Advanced security: The future growth of SDVs increases the attack surface in vehicles, which requires advanced security protection not just for multi-functional high-performance compute platforms, but also single-function low-power MCUs. These protections are needed throughout the entire lifetime of the vehicle, with the ability to provide ongoing software updates increasingly important.

The technology for automotive MCUs​

As proven by automotive industry leaders like NXP, Renesas, STMicroelectronics, Elmos, and indie Semiconductor, along with continued investment in the extensive software ecosystem, Arm is delivering the stable, reliable, safe and secure MCU technology for partners to scale their products and focus their time on differentiation rather than rewriting their software. As the automotive industry continues to go through unprecedented transformation that requires more compute capabilities, safety features and software support, Arm will be the technology choice for future MCUs.

 

[Tothemoon24]

Episode 29 – Podcast With Edge Impulse CEO Zach Shelby On AI After The “Hype Cycle,” Generated Data Sets, Tradeoffs Of Scale, & Real-World Needs​

Zach Shelby, CEO of Edge Impulse, was a recent guest on the BrainChip podcast. Shelby is an IoT pioneer in simplifying development platforms for AI at the edge. He brought his passion for machine learning, embedded solutions and IoT to this lively and enlightening discussion with BrainChip CMO Nandan Nayampally. Hear about Shelby’s astounding metrics for developer recruitment, training volume, and adoption; using AI to fill the gap when data sets are small or non-existent; the challenges of bringing AI to manufacturing and real-world use cases.
Shelby is a familiar and highly respected leader in the ML community. He founded Sensinode, an enterprise wireless network provider in the early days of IoT that was acquired by ARM, enabling him to develop ARM’s IoT business, first as Director of Technology and later as VP of Developers. At ARM, he helped create the non-profit BBC Micro:bit Educational Foundation and served as its CEO. In addition to his activities as a serial entrepreneur, Shelby is an angel investor in Amini.ai, Augmenta.ai, Operant.ai, and Petasense. Shelby serves on the board of TinyML and has won a Nokia Foundation Award for his work on IoT.

Related Posts​

 

[Tothemoon24]

This article is from 5 months ago still good to ear about it​

Consortium Produces Solution for Advanced Hearing Aid Tech​

Cadence Design Systems successfully collaborated with a consortium that included GlobalFoundries (GF), Hoerzentrum Oldenburg gGmbH, and Leibniz University Hannover to develop the industry’s first binaural hearing aid system-on-chip (SoC) prototype, which is programmable with high-programming languages and enables customers to create hearing aidsthat process critical sounds more optimally while simultaneously reducing background noise.
The new SoC, called the Smart Hearing Aid Processor (SmartHeAP), is based on the Cadence Tensilica Fusion G6 DSP and Tensilica Xtensa LX7 processor, the Cadence digital full flow and the GF 22FDX platform. The SmartHeAP project is supported by the German Federal Ministry of Education and Research under grant 16ES0760.
“The collaboration between GF, Cadence, Hoerzentrum Oldenburg gGmbH and Leibniz University Hannover resulted in a successful hearing aid SoC that consumes significantly less power while providing hearing aid wearers with the first-of-its-kind binaural technology that transforms how they process a complete auditory scene,” says Ted Letavic, corporate fellow, GlobalFoundries. “By harnessing the power of the Cadence Tensilica DSP and digital full flow combined with the energy efficiency of the 22FDX platform, we delivered compelling PPA results.”
The SmartHeAP SoC prototype provides hearing aid companies with all the components required to create and reprogram hearing devices that improve a wearer’s hearing experience. Some of the key benefits the SmartHeAP SoC prototype provides include:

• Binaural hearing technology: Hearing aids in the right and left ears communicate with one another, enabling a wearer to pick up sounds from the full auditory scene without destroying the binaural cues.
• Improved hearing loss compensation capabilities: Through advanced algorithms, the SoC automatically analyzes the incoming signal and provides adaptive sound amplification that is customized to the wearer’s unique hearing needs.
• High processing capacity with minimal power consumption: Provides the hearing aid wearer with optimal sound quality in real time while conserving power and extending hearing aid battery life.
• Cost Savings: The hearing aid software can be quickly upgraded without replacing the hardware, saving both the wearers and the hearing aid companies money.
• Faster time to market: Hearing aid companies of all sizes can effectively compete in the market due to the ease of use of high-level programming languages, which enable faster innovation cycles.

“By collaborating with GF, Hoerzentrum Oldenburg gGmbH and Leibniz University Hannover on the SmartHeAP SoC prototype, our research and technology advancements are improving the hearing experience,” says Rishi Chugh, vice president, product management in the IP Group at Cadence. “Each organization involved brought a unique perspective to the project, and delivering a successful prototype that can make a positive impact on the hearing experience is the ultimate reward. The Cadence digital full flow and Tensilica Fusion G6 DSP and Xtensa LX7 controller were foundational for this project, and the consortium is already seeing a high level of interest in the prototype from the hearing aid industry.”
The Tensilica Fusion G6 DSP and Xtensa LX7 processor, as well as the digital full flow, support Cadence’s broader Intelligent System Design Strategy, enabling SoC design excellence.

 

[Pom down under]

BrainChip’s Neuromorphic Technology Enables Intellisense Systems to Address Needs for Next-Generation Cognitive Radio Solutions

Discover the transformative capabilities of BrainChip's advanced AI technology in enabling efficient and intelligent radio communications.

brainchip.com

As stated in the above and shown below, (one such project)

One such project is the development of a new Neuromorphic Enhanced Cognitive Radio (NECR) device to enable autonomous space operations on platforms constrained by size, weight and power (SWaP). Intellisense’s NECR technology provides NASA numerous applications and can be used to enhance the robustness and reliability of space communication and networking, especially cognitive radio devices. Smart sensing algorithms will be implemented on neuromorphic computing hardware, including Akida, and then integrated with radio frequency modules as part of a Phase II prototype.

And below are 2 other such projects.

February 2023 | SBIR.gov

www.sbir.gov

Intellisense Systems, Inc.
21041 S. Western Ave.
Torrance, CA 90501-1727
United States
Hubzone Owned:
No

Socially and Economically Disadvantaged:
No
Woman Owned:
No

Duns:
080921977
Principal Investigator
Name: Marc SeGall
Phone: (310) 320-1827
Email: msegall@intellisenseinc.com
Business Contact
Name: Selvy Utama
Phone: (310) 320-1827
Email: notify@intellisenseinc.com
Research Institution
N/A
Abstract
To address the United States Space Force’s need for an automated process for detecting threat events directly at the sensor in order to support course of action (COA) selection and execution in relevant timelines, Intellisense Systems, Inc. (Intellisense) proposes to develop a new Edge-based, Real-time Detector for Space Object Threats (ERDSPOT), which uses an innovative artificial intelligence (AI) approach running on embedded hardware to detect satellites and space debris in real time with >95% accuracy from non-resolved imagery without requiring a known object state estimate catalog or any other downstream information. ERDSPOT then utilizes a novel, AI-assisted multi-frame analysis to identify threat events or potential threat events such as closely spaced objects, breakups, and collisions in as little as two frames (at <1 s per frame), thereby providing alerts to operators for COA selection with <10 s of image collection. To ensure that all relevant information is relayed to the operator, ERDSPOT provides the type of event detected, threat level, and, in the case of potential threats, a probability of the event occurring and the expected timeframe for it to occur. ERDSPOT supports all telescopes and telescope tracking methodologies, including fixed staring, single object tracking, and general scanning, can monitor objects in low Earth orbit, medium Earth orbit, and geosynchronous orbit, and is sensitive enough to monitor objects as small as 1 cm in low Earth orbit. In Phase I, Intellisense will identify the types of events that can be visually categorized in non-resolved imagery and develop and demonstrate a proof-of-concept system that can automatically detect those events in simulated images. From this, Intellisense will identify the remaining key technical challenges and the technology readiness level of the system. This will be used to generate a technology maturation plan to mature ERDSPOT in later phases. In Phase II, Intellisense will develop a software package based on the Phase I demonstrator software to generate alerts that enable operator COA selection and execution in <10 s of imagery collection without access to a known object state estimate catalog. Intellisense will demonstrate the capabilities of the software package by comparing its performance to traditional processing approaches and by demonstrating that ERDSPOT has a minimal number of false positives, false negatives, and minimal alert latency. We will also work with the USSF to establish an integration path under a program of record and establish preliminary requirements for third party integration of ERDSPOT.

Adaptive Deep Onboard Reinforcement Bidirectional Learning System | SBIR.gov

www.sbir.gov

Adaptive Deep Onboard Reinforcement Bidirectional Learning System​

Award Information
Agency:National Aeronautics and Space Administration
Branch:N/A
Contract:80NSSC22PB053
Agency Tracking Number:221780
Amount:$149,996.00
Phasehase I
Program:SBIR
Solicitation Topic Code:H6
Solicitation Number:SBIR_22_P1
Timeline
Solicitation Year:2022
Award Year:2022
Award Start Date (Proposal Award Date):2022-07-22
Award End Date (Contract End Date):2023-01-25
Small Business Information
INTELLISENSE SYSTEMS INC
21041 South Western Avenue
Torrance, CA 90501-1727
United States
DUNS:080921977
HUBZone Owned:No
Woman Owned:No
Socially and Economically Disadvantaged:No
Principal Investigator
Name: Fang Zhang
Phone: (310) 320-1827
Email: notify@intellisenseinc.com
Business Contact
Name: Jeanine Newcomb
Phone: (424) 319-7748
Email: jnewcomb@intellisenseinc.com
Research Institution
N/A
Abstract
NASA is seeking innovative neuromorphic processing methods and tools to enable autonomous space operations on platforms constrained by size, weight, and power (SWaP). To address this need, Intellisense Systems, Inc. (Intellisense) proposes to develop an Adaptive Deep Onboard Reinforcement Bidirectional Learning (ADORBL) processor based on neuromorphic processing and its efficient implementation on neuromorphic computing hardware. Neuromorphic processors are a key enabler to the cognitive radio and image processing system architecture, which play a larger role in mitigating complexity and reducing autonomous operations costs as communications and control become complex. ADORBL is a low-SWaP neuromorphic processing solution consisting of multispectral and/or synthetic aperture radar (SAR) data acquisition and an onboard computer running the neural network algorithms. The implementation of artificial intelligence and machine learning enables ADORBL to choose processing configurations and adjust for impairments and failures. Due to its speed, energy efficiency, and higher performance for processing, ADORBL processes raw images, finds potential targets and thus allows for autonomous missions and can easily integrate into SWaP-constrained platforms in spacecraft and robotics to support NASA missions to establish a lunar presence, to visit asteroids, and to extend human reach to Mars. In Phase I, we will develop the CONOPS and key algorithms, integrate a Phase I ADORBL processing prototype to demonstrate its feasibility, and develop a Phase II plan with a path forward. In Phase II, ADORBL will be further matured, implemented on available commercial neuromorphic computing chips, and then integrated into a Phase II working prototype along with documentation and tools necessary for NASA to use the product and modify and use the software. The Phase II prototype will be tested and delivered to NASA to demonstrate for applications to CubeSat, SmallSat, and rover flights.