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Very recently meaning last day or so in one of the company presentations and I have a feeling it was one by Peter van der Made it specifically referenced an involvement with a robotics project???Thanks Tech,
As you say, Digimarc has been showing up for a while in "Brainchip" patent searches, but Giant Ai is new. This means that the patent specifications refer to Brainchip, but it is not a real endorsement. Rather it is just cited in a grocery list of ML accelerators:
WO2022212916A1 HYBRID COMPUTING ARCHITECTURES WITH SPECIALIZED PROCESSORS TO ENCODE/DECODE LATENT REPRESENTATIONS FOR CONTROLLING DYNAMIC MECHANICAL SYSTEMS
[00115] ... One or more of the upstream, intermediate (or downstream) encoders may be implemented within one or more hardware ML Accelerators like, but not limited to, Movidius chips, tensorflow edge compute devices, Nvidia Drive PX and Jetson TX1/TX2 Module, Intel Nervana processors, Mobileye EyeQ processors, Habana processors, Qualcomm’s Cloud All 00 processors and SoC AI engines, IBM’s TrueNorth processors, NXP’s S32V234 and S32 chips, AWS Inferentia chips, Microsoft Brainwaive chips, Apple’s Neural Engine, ARM’s Project Trillium based processors, Cerebras’s processors, Graphcore processors, PEZY Computing processors, Tenstorrent processors, Blaize processors, Adapteva processors, Mythic processors, Kalray’s Massively Parallel Processor Array, BrainChip’s spiking neural network processors, Almotiv’s neural network acceleration core, Hailo-8 processors, and various neural network processing units from other vendors. Different ones of these ML Accelerators may be used to implement different ones of the aforementioned models upon sensor data (or upstream encoder output data), such as based on matching of model performance on a given accelerator for given sensor output.
Putting the best ace on this means that, as far as Giant Ai is concerned, Brainchip's spiking neural network processor is well known to the person skilled in the art, and requires no further description.
They use the term "hybrid" to describe a combination of sensor and ML processing capability on a single chip:
View attachment 20011
[0020] To mitigate these issues, some embodiments may implement a hybrid architecture in which subsets of sensors of a controlled dynamic mechanical system, like one or more sensors or each of a plurality of sensors, have outputs coupled to a hardware machine- learning accelerator for performing some or all of a pipeline of operations by which inferences (e.g., about system state, environment, action, etc.) are implemented to support control of the dynamic mechanical system. For example, some embodiments of robots and other controlled dynamic mechanical systems described herein may include a plurality of sensors of a modular system hardware design such that each sensor (or a grouping of sensors) is coupled (directly, in some examples) with special-purpose chipsets for performing a space (e.g., like a sub-space or latent-space) or other encoding of sensor data prior to downstream digestion by a higher-level component or model of the system.
“some embodiments of robots and other controlled dynamic mechanical systems described herein may include a plurality of sensors of a modular system hardware design such that each sensor (or a grouping of sensors) is coupled (directly, in some examples) with special-purpose chipsets for performing a space”
My opinion only DYOR
FF
AKIDA BALLISTA