Don't know if covered previously but something I just found within ARM which I wasn't aware of, is their Arm Flexible Access.
A revolutionary new way to experiment before you invest with unprecedented access to our industry-leading IP
www.arm.com
What led me there was these guys I was reading up on....Femtosense....early stage start up with some backing by Vanedge Capital it seems.
Not saying in same league as BRN or have same capabilities....was more about the ARM IP access, these guys have an ARM blog early 2021 so before we in the ARM ecosystem...well...formally announced anyway haha.
If you read some of the below & links can see that Hailo, Synaptics, MemryX have also dabbled in ARM Flexible Access early on.
Wonder if BRN has exposure through this channel also?
femtosense.ai
SPU Architecture
Near-Memory-Compute
- Distributes memory into small banks near processing elements to improve throughput
- Reduces data motion by performing computations close to on-chip memory banks
- Eliminates energy and memory bottlenecks caused by accessing off-chip memory
Scalable Core Design
- Can be scaled to match needs and constraints of any deployment environment
- Targets a wide range of applications and form factors
- Digital design can be ported to other process nodes to balance performance and cost
10 x 10 =
DUAL SPARSITY
Our hardware can achieve multiplicative benefits in speed and efficiency when both forms of sparsity are present.
SPARSE Weights
- Supports sparsely connected models
- Only stores and computes on weights that matter
- 10x improvement in speed, efficiency, and memory
SPARSE ACTIVATIONS
- Supports sparse activations
- Skips computation when a neuron outputs zero
- 10x increase in speed and efficiency
Core Design
4 Core Configuration
- 512 kB on-chip SRAM per core
- 5 MB effective SRAM with weight sparsity
- 1.3 mm2 single core (22nm process)
- AXI interface
Sam Fok, co-founder and CEO of silicon startup Femtosense, explains how Arm Flexible Access for Startups enables the development of a neuromorphic AI chip
www.arm.com
Femtosense: Our Ultra-efficient AI Chip, Built with Arm Flexible Access
Sam Fok, co-founder and CEO of silicon startup Femtosense, explains how Arm Flexible Access for Startups enabled the development of a neuromorphic AI chip
One classical pathway to technology success runs from university research to commercial startup. It’s an exciting journey in which a small group of grad students takes a spark of innovation from research and kindles it into a technology that they hope will transform the world.
That journey has its challenges as the technology moves from the lab into the rigorous and sometimes unforgiving world of product development. And it’s a journey my co-founder, Alexander Neckar, and I embarked on two years ago out of Stanford.
Our startup, Femtosense, emerged from work we did in Stanford’s Electrical Engineering graduate program on a project called Braindrop—a mixed-signal neuromorphic system designed to be programmed at a high level of abstraction.
Neuromorphic systems are silicon versions of the neural systems found in neurobiology. It’s a growing field, offering a range of exciting possibilities such as sensory systems that rival human senses in real-time.
Over the past two years, we’ve nurtured our startup to develop the aspects of the technology with commercial potential. We’ve taken the original concept and built a neural network application-specific integrated circuit (ASIC) for the general application area of ultra-efficient AI. As a start, we want to enable ultra-power-efficient inference in embedded endpoint devices everywhere.
Why did we venture down this path? Datacenter technology is well-developed and has different technical challenges than edge technology. Further, consumers and market competition are pushing for edge and endpoint devices with ever-increasing capability. AI can and should be deployed at the endpoints when feasible to reduce latency, lower computing costs, and enhance security.
Area and power major considerations in neural networks
But designing such an ASIC (any ASIC really) is a unique challenge in today’s ultra-deep submicron world. For one thing, area and power considerations loom large. Neural networks are a different animal than classical signal processing. Designing an ASIC or system-on-chip (SoC) for neural networks presents a different challenge than, say, designing an efficient DSP or microcontroller.
Neural networks have a lot of parameters, are quite memory intensive, and have a lot of potential for energetically expensive data motion. Of primary concern is the question of on-chip versus off-chip memory. Off-chip memory provides excellent density, allowing for bigger models, but accessing off-chip memory costs a lot of energy, which often puts such systems beyond the power budgets of the envisioned initial applications.
So, when you’re looking at ultra-power-efficient endpoint embedded solutions, you will want to put everything a single die, but then you will hit area and cost issues. This is where algorithm-hardware codesign comes into play; the two really must be done together.
You can’t just naively take an algorithm and map it down to a chip. It would cost too much energy or money or not just perform well. You have to think carefully about how to make that algorithm efficient. That’s the hardware and algorithm co-design challenge. We spend a lot of effort on the algorithm side to fit everything on-chip, and, once it’s on-chip, to map the algorithm onto the chip’s compute fabric.
As we design, we’re exploring many potential applications because we want to apply our technology as widely as possible. The market is not nearly as black-and-white as endpoint-and-cloud terminology suggests.
We see it as a continuum. It’s not like you’re either in datacenters or in tiny battery-powered devices. There are many nodes across the spectrum—everything from on-prem servers, to laptops, phones, smartwatches, earbuds, and even sensors out in the middle of nowhere with no power source could use more efficient neural network compute.
We want to deliver ultra-efficient compute. To us, this is our primary mission. When you’re in tough environments with tight requirements, that’s when you’re going to want to use our technology.
Arm Flexible Access for Startups gave us the design flexibility we needed
We’re a small team for now, so we need to focus on our strengths. There’s the core hardware accelerator, the software that goes with it, and the algorithms. Then, there’s technology to take that value and serve customers. This is where we’re very excited to be working with Arm and the Arm Flexible Access for Startups program.
To integrate with customer designs, you need an interface to handle communications and off-load a bit of compute. This is not something we think about day-to-day in terms of our core engineering or IP. This is why it’s paramount to have a well-established, reliable partner like Arm to work with because you don’t have to reinvent everything or spend effort educating the market. Everyone knows Arm, and Arm is a well-known path to integration. Arm solves one of our biggest commercial challenges, and that’s why working with Arm is key.
One of the attractive elements of the Arm Flexible Access for Startups program is the ecosystem support. The ecosystem reduces barriers to adoption, which in turn drives innovation. When you’re planning projects, you need clear and accessible specifications and information about which products do what.
Making actionable information available upfront without huge outlays and with the ability to evaluate different IP and run experiments in the sandbox is huge for us. The program’s pricing models are much more aligned with how startups grow than traditional IP vending.
Standing at the beginning of the SoC integration path, we have an exciting journey ahead, and we’ll have more interesting perspectives the deeper we get into it. We have the initial design and are moving toward an ASIC implementation, making the Arm Flexible Access for Startups program an important tool to have.
2020 blog post with bit of insight.
When I joined Arm a little more than 18 months ago, I was thrilled to become part of a team of people delivering the foundational technology for billions ...
www.design-reuse.com
| Arm Flexible Access one year later: Accelerating innovation for more than 60 partners and countingarm Blogs - Dipti Vachani, Arm
Aug. 24, 2020 |
When I joined Arm a little more than 18 months ago, I was thrilled to become part of a team of people delivering the foundational technology for billions of devices each year, from sensors to smartphones to supercomputers. The convergence of 5G, IoT, and AI is driving multiple industries to transform at the same time. We see this transformation in retail, automotive, factories, homes, and our cities. One of my first questions to the team was simply, “how do we make Arm the easiest company to innovate with?”
No matter the size of the business or sector, to deliver innovative new technologies, our partners need the fastest, lowest-cost and minimum-risk journey to SoC design. This was the thinking when we launched
Arm Flexible Access last summer; to provide both new and existing partners with access to more than 75% of Arm’s IP portfolio, support, tools and training, but with no up-front licensing commitment.
One year later, Flexible Access is now Arm’s fastest-growing program ever with more than 60 partners signing up for the freedom to experiment, evaluate, design and customize
their own unique SoCs. The program is empowering existing partners and more than 30 first-time Arm IP customers to address growth opportunities in IoT, machine learning, autonomous systems and automotive. Flexible Access provides these first-time customers with a portal to the largest ecosystem of tools, services and software.
In my conversations with Flexible Access users, the feedback has been overwhelmingly positive and already we’re seeing some great early success stories. These include ASIC houses such as Faraday and Socionext, established semiconductor companies such as Nordic Semiconductor, startups including
Atmosic and
Hailo, and even government bodies such as the
Korean Ministry of SMEs and Startups, which has invested in the program to support startups in the region. OEMs which previously used third-party design houses to create the full design of their chips, are now able to develop their SoCs in a far more collaborative way with direct access to all of the IP they need.
Simple and easy
Two words I consistently hear from partners when talking about accessing our IP through Flexible Access are “simple” and “easy”, which enables them to focus on delivering fantastic new innovations. One example that really stood out recently came from new partner
ZhorTech, which has developed new advanced footwear technology. Flexible Access allowed them to develop a chip that uses AI algorithms embedded into shoes, with multiple applications including detecting musculoskeletal malformations, monitoring diseases like Parkinson or diabetes, detecting fatigue and injury risk, or transforming the shoes into a gaming accessory.
Since launching Flexible Access, we have been evolving the program based on our partners’ requirements and feedback. This includes special adaptations for both
silicon startups and
research institutions, to cater to their specific needs. Startups such as
Femtosense and
MemryX have been able to immediately access Arm IP, empowering them to begin silicon design much earlier, even before they have secured VC funding.
Researchers and academics also have the freedom to experiment and increase their opportunities using commercially relevant IP for their projects.
More please
Another consistent point of feedback I hear from Flexible Access customers is “give us more please.” We are regularly expanding the range of IP within the program. Most recently we have added a new Arm Corstone subsystem reference design, providing SoC designers with pre-integrated IP blocks for faster design while reducing verification requirements. We have also expanded the range of physical IP, meaning designers can optimize and predict the power-performance area of their chips.
SoC designs are becoming increasingly complex, but the design process itself doesn’t have to be. The results of this program speak for themselves as 15 percent of the companies who have joined Flexible Access in its first year are already moving toward tape-out. I for one can’t wait to see what the next year brings!