Akida v von Neumann
von Neumann computers have hardware processor and two types of "soft" inputs - programs (application programs) and data. In addition, the processor has its internal program (operating system) to control the implementation of the application program. vN computers usually use 32-bit data or higher, although some microprocessors may use 16 or even 8 bits.
The application program determines the processor steps which are to be performed with the data.
In Akida SNN, the models must be adapted to the appropriate format (1, 2, or 4-bit).
Before the chip is utilized, the NN must be configured, and this depends on the particular use - audio, video, etc. Usually the models will relate to subsets of these categories. For example, an agricultural model may have images to distinguish crops and weeds, an autonomous driving model may distinguish between fixed and mobile objects, etc.
Configuration involves determining the number of layers of the NN, the number of NPUs in each layer, the interconnections (synapses) between the NPUs of the adjacent layers, and the weights to be applied to the synaptic values.
Configuration does involve the associated CPU.
Once the NN is configured, the input data is processed entirely in silicon in accordance with the configuration without the involvement of the CPU.
The configuration determines how the input (video, audio, etc.) is processed. So, in a sense, configuration of the NN may be considered as analogous to programming in a von Neumann processor. The difference is that, in vN, the processor has to repeatedly retrieve instructions and data from memory, whereas Akida automatically performs the required oprations on the real time input data stream as determined by the configuration which is resident in the processor itself.
Just so it does not appear too daunting a task to set up Akida, BRN has compiled many "standard" Akida models which are available together with appropriate configurations, and these can also be adapted for specific tasks if necessary.
von Neumann computers have hardware processor and two types of "soft" inputs - programs (application programs) and data. In addition, the processor has its internal program (operating system) to control the implementation of the application program. vN computers usually use 32-bit data or higher, although some microprocessors may use 16 or even 8 bits.
The application program determines the processor steps which are to be performed with the data.
In Akida SNN, the models must be adapted to the appropriate format (1, 2, or 4-bit).
Before the chip is utilized, the NN must be configured, and this depends on the particular use - audio, video, etc. Usually the models will relate to subsets of these categories. For example, an agricultural model may have images to distinguish crops and weeds, an autonomous driving model may distinguish between fixed and mobile objects, etc.
Configuration involves determining the number of layers of the NN, the number of NPUs in each layer, the interconnections (synapses) between the NPUs of the adjacent layers, and the weights to be applied to the synaptic values.
Configuration does involve the associated CPU.
Once the NN is configured, the input data is processed entirely in silicon in accordance with the configuration without the involvement of the CPU.
The configuration determines how the input (video, audio, etc.) is processed. So, in a sense, configuration of the NN may be considered as analogous to programming in a von Neumann processor. The difference is that, in vN, the processor has to repeatedly retrieve instructions and data from memory, whereas Akida automatically performs the required oprations on the real time input data stream as determined by the configuration which is resident in the processor itself.
Just so it does not appear too daunting a task to set up Akida, BRN has compiled many "standard" Akida models which are available together with appropriate configurations, and these can also be adapted for specific tasks if necessary.
Looks like BC are up to project TENN.
) appears to be the one behind the new demo I spotted in the picture of the BrainChip booth at the Hardware & Edge AI Summit 2024:
