WBT Discussion 2022

[Slymeat]

The following is a well written article explaining how WeebitNano ReRAM is a far superior technology to FLASH. It’s only a 2 minute read and does not get technical.

Non-volatile memory considerations for data logging

In addition to explaining the critical aspects of ReRAM NVM well, ( as compared to FLASH—ReRAM is faster, cheaper, more resilient to heat and radiation, uses less power, operates at much lower voltage, less susceptible to cyber attack, lasts longer, can be embedded in sub 40 nm architecture etc.) the article touches on a point that I feel is the crux to why FLASH simply can’t compete in longevity with ReRAM and simply must be replaced by it in ALL applications that read and write data frequently. Aside from the fact that ReRAM has at least orders of magnitude improvements in read/write cycles (the number of times you can read and write data to it) FLASH suffers the problem of requiring a “page erase cycle” before programming a new page. That means, even when writing a single bit, an entire page of bytes is taken through one of their precious write cycles.

And this is why Weebit’s selector is so important.

Here’s some supporting technical data I found on the internet regarding the page erase cycle required by FLASH.

1 instruction = 3 bytes = 2 addresses

erase page = 1024 instructions = 3072 bytes = 2048 addresses

write page = 64 instructions = 192 bytes = 128 addresses

Even to the layperson, that appears to be a hell of a lot of wasted effort (and energy), just to write a piece of data.

The above is from a reasonably old answer (2016) on the Microchip forum but I figure FLASH is an old technology and hasn’t been improved much.

This 2021 article from Silicon labs suggests flash pages can be anywhere from 512 bytes to 4096 bytes, in their particular module. So clearly, things haven’t changed much.

Reading and writing FLASH is actually far more complicated, as discussed briefly in Wikki. The world is full,of workarounds, both in code and in hardware, and simply MUST be looking for a viable replacement—bring on ReRAM.

So in a nutshell, with FLASH, you can remove the need for an erase block cycle iff the new data being written ONLY replaces existing “1”s with “0”s. i.e you can write (without erase) 1110 over the top of 1111. But then this requires a read cycle and a calculation to determine if it is possible. And if not possible, all that effort is purely wasted.

ReRAM requires merely a single write cycle, regardless of whatever the value is and regardless of what is currently stored.

 

[Slymeat]

Pitt Street research have raised their valuation for Weebit Nano to $6.10 per share. I think this is conservative, but let’s go with that for a little while.

The research paper is comprehensive and serves as a great reference paper for what Weebit is all about.

I particularly like the author’s view on the impact of TSCM also have a competitive ReRAM offering. It confirms my own opinion and certainly answers a lot of questions I have seen floating around the internet.

 

[alwaysgreen]

Pitt Street research have raised their valuation for Weebit Nano to $6.10 per share. I think this is conservative, but let’s go with that for a little while.

The research paper is comprehensive and serves as a great reference paper for what Weebit is all about.

I particularly like the author’s view on the impact of TSCM also have a competitive ReRAM offering. It confirms my own opinion and certainly answers a lot of questions I have seen floating around the internet.
View attachment 28562

The floodgates are well and truly open at the moment! What a momentous few months ahead for Weebit.

Out of curiosity, why would other foundries and chip manufacturers be unable to access TMSCs ReRam? Surely they would sell it to whoever wanted it?

 

[Slymeat]

The floodgates are well and truly open at the moment! What a momentous few months ahead for Weebit.

Out of curiosity, why would other foundries and chip manufacturers be unable to access TMSCs ReRam? Surely they would sell it to whoever wanted it?

WRT anyone not having the ability to source ReRAM from TMSC (as suggested in the referenced article), I can only accept this might be a supply or logistics issue. I’m hoping that Weebit ReRAM will be available in enough foundries to make it an in-country source for many customers. That should certainly help with supply logistics. I am aware that TMSC is building a fab in Arisona, but that is not yet operational.

I have also seen articles discussing some customers wanting to “give it to the biggest player” and source chips from elsewhere—an anti-monopolising stance. Maybe customers who have been stung by TMSC in the past or stung with delays in shipping the chips.

And given the recent world chip-shortage problem, others probably are looking for alternate suppliers. Weebit’s ReRAM offering can be manufactured in any fab, it does not require the advanced technologies that TMSC have on offer. But then doesn’t exclude using that technology either, especially if it eventually prooves capable of scaling down to much smaller architectures.

Their are also some geopolitical reasons, but I don’t think that was the intent of the author.

 

[Slymeat]

Only 1291/173,640,855 shares of Weebit shorted. Why am I not suprised?

You’d have to be either brave, or stupid, to short Weebit at the moment.

 

[cosors]

The following is a well written article explaining how WeebitNano ReRAM is a far superior technology to FLASH. It’s only a 2 minute read and does not get technical.

Non-volatile memory considerations for data logging

In addition to explaining the critical aspects of ReRAM NVM well, ( as compared to FLASH—ReRAM is faster, cheaper, more resilient to heat and radiation, uses less power, operates at much lower voltage, less susceptible to cyber attack, lasts longer, can be embedded in sub 40 nm architecture etc.) the article touches on a point that I feel is the crux to why FLASH simply can’t compete in longevity with ReRAM and simply must be replaced by it in ALL applications that read and write data frequently. Aside from the fact that ReRAM has at least orders of magnitude improvements in read/write cycles (the number of times you can read and write data to it) FLASH suffers the problem of requiring a “page erase cycle” before programming a new page. That means, even when writing a single bit, an entire page of bytes is taken through one of their precious write cycles.

And this is why Weebit’s selector is so important.

Here’s some supporting technical data I found on the internet regarding the page erase cycle required by FLASH.

1 instruction = 3 bytes = 2 addresses

erase page = 1024 instructions = 3072 bytes = 2048 addresses

write page = 64 instructions = 192 bytes = 128 addresses

Even to the layperson, that appears to be a hell of a lot of wasted effort (and energy), just to write a piece of data.

The above is from a reasonably old answer (2016) on the Microchip forum but I figure FLASH is an old technology and hasn’t been improved much.

This 2021 article from Silicon labs suggests flash pages can be anywhere from 512 bytes to 4096 bytes, in their particular module. So clearly, things haven’t changed much.

Reading and writing FLASH is actually far more complicated, as discussed briefly in Wikki. The world is full,of workarounds, both in code and in hardware, and simply MUST be looking for a viable replacement—bring on ReRAM.

So in a nutshell, with FLASH, you can remove the need for an erase block cycle iff the new data being written ONLY replaces existing “1”s with “0”s. i.e you can write (without erase) 1110 over the top of 1111. But then this requires a read cycle and a calculation to determine if it is possible. And if not possible, all that effort is purely wasted.

ReRAM requires merely a single write cycle, regardless of whatever the value is and regardless of what is currently stored.

Thank you faithful buddy

 

[cosors]

Only 1291/173,640,855 shares of Weebit shorted. Why am I not suprised?

You’d have to be either brave, or stupid, to short Weebit at the moment.

View attachment 28567

As a German in four years on the ASX I have not met a share with 0 shorts.

 

[cosors]

@jeff2151 how are you? I am a pack
human. I need to know how my pack is doing.
Your wish with WBT is coming true right now.
I am with you. You are worth a lot to me!
Greetings from Köln. I'm with you
___
my pack

 

[cosors]

I recommend everyone to listen to it!

~...we would need a team ten times bigger than today to work with all fabs in parallel
___
It's no wonder that the team made that little mistake the other day. Full understanding from me.
____
Can any of you describe in simple terms what a selector is? Sorry for the naive question. I am dealing with IT just for a short time.

 

[alwaysgreen]

I recommend everyone to listen to it!

~...we would need a team ten times bigger than today to work with all fabs in parallel
___
It's no wonder that the team made that little mistake the other day. Full understanding from me.
____
Can any of you describe in simple terms what a selector is? Sorry for the naive question. I have not been dealing with IT for a long time.

From the Weebit website:

A selector is a device used in each bit cell in a memory array to ensure optimized cell access within the array, while suppressing unwanted current flow in unselected cells (called “sneak path” current). The type of selector used has a significant impact on the area of a memory bit cell. In the embedded space, a transistor is typically used as the selector device, but density requirements in discrete chips dictate the need to use other selector devices such as an OTS selector.

 

[cosors]

From the Weebit website:

A selector is a device used in each bit cell in a memory array to ensure optimized cell access within the array, while suppressing unwanted current flow in unselected cells (called “sneak path” current). The type of selector used has a significant impact on the area of a memory bit cell. In the embedded space, a transistor is typically used as the selector device, but density requirements in discrete chips dictate the need to use other selector devices such as an OTS selector.

correction: I am dealing with IT just for a short time.

Thank you! That helps a little bit. I understand it like an administrative unit. I'm not that proficient in English to understand everything from the interview. In addition, I still don't understand why the selector is such a challenge for Weebit, even though I realize it's a complicated thing. Does Weebit have to develop this selector itself for each different and specific customer setting/specification?

Can't they get help for that development in cooperation even if it reduces the margin? But it was often mentioned that they have so much to do that they may not have enough time for something like that. Please bear with me for this question as well.

 

[alwaysgreen]

correction: I am dealing with IT just for a short time.

Thank you! That helps a little bit. I understand it like an administrative unit. I'm not that proficient in English to understand everything from the interview. In addition, I still don't understand why the selector is such a challenge for Weebit, even though I realize it's a complicated thing. Does Weebit have to develop this selector itself for each different and specific customer setting/specification?

Can't they get help for that development in cooperation even if it reduces the margin? But it was often mentioned that they have so much to do that they may not have enough time for something like that. Please bear with me for this question as well.

Good question! Maybe we need to call Diogenese in here for help.

 

[Slymeat]

correction: I am dealing with IT just for a short time.

Thank you! That helps a little bit. I understand it like an administrative unit. I'm not that proficient in English to understand everything from the interview. In addition, I still don't understand why the selector is such a challenge for Weebit, even though I realize it's a complicated thing. Does Weebit have to develop this selector itself for each different and specific customer setting/specification?

Can't they get help for that development in cooperation even if it reduces the margin? But it was often mentioned that they have so much to do that they may not have enough time for something like that. Please bear with me for this question as well.

Layman's response:

• Weebit's selector is the same for every customer - so they do not need to create a new selector for each customer. It is one size fits all.
• Weebit has achieved a selector that can be used for both embedded and discrete implementations. Their current work is to refine it, especially for smaller architectures.
  • embedded is where the IP is incorporated into a chip with other elements - a SOC solution. This is where I saw that Weebit and BrainChip could co-operate - Akida needs to persistently store some data along the way - i.e all the stuff it self-learns, and the stuff it is trained with.
  • discrete is where you buy something like a memory stick containing dedicated memory chips.
• The selector simply does what it's name suggests - it selects data within the array of memory cells.
  • And since ReRAM stores state as resistances, one resistance for a zero and another for a one, a novel way of probing the array is necessary, an approach that only their competitors (with ReRAM technology) would know anything about. And I don;t think they will want to share!
  • FLASH, SDRAM, MRAM etc store state as either an electric or magnetic charge and employ well known processes to probe the matrix. Well known, but in the case of FLASH: slow, complicated and inefficient of energy.
  • In FLASH, individual programmers need to manually code many selector activities—but I won't go into that here.
  • Weebit's ReRAM selector does not require the programmers to make the same manual coding choices. It's much like how in C and C++ programming, programmers needed to pay meticulous attention to memory cleanup. Something Java programmers don't need to do, and now Java is much more prevalent.
• Major considerations for the selector are:
  • access the data fast and using the least energy
  • don't alter the data being accessed
  • don't interfere with data in adjacent cells (this is where the term "leakage" comes into play.
  • make the data accessed as small as possible - a single bit is preferable.
  • add minimal overhead.

I'd say a seamless selector will be the icing on the cake for customer uptake of ReRAM, as per my C/C++ and Java analogy above.

 

[cosors]

Layman's response:

• Weebit's selector is the same for every customer - so they do not need to create a new selector for each customer. It is one size fits all.
• Weebit has achieved a selector that can be used for both embedded and discrete implementations. Their current work is to refine it, especially for smaller architectures.
  • embedded is where the IP is incorporated into a chip with other elements - a SOC solution. This is where I saw that Weebit and BrainChip could co-operate - Akida needs to persistently store some data along the way - i.e all the stuff it self-learns, and the stuff it is trained with.
  • discrete is where you buy something like a memory stick containing dedicated memory chips.
• The selector simply does what it's name suggests - it selects data within the array of memory cells.
  • And since ReRAM stores state as resistances, one resistance for a zero and another for a one, a novel way of probing the array is necessary, an approach that only their competitors (with ReRAM technology) would know anything about. And I don;t think they will want to share!
  • FLASH, SDRAM, MRAM etc store state as either an electric or magnetic charge and employ well known processes to probe the matrix. Well known, but in the case of FLASH: slow, complicated and inefficient of energy.
  • In FLASH, individual programmers need to manually code many selector activities—but I won't go into that here.
  • Weebit's ReRAM selector does not require the programmers to make the same manual coding choices. It's much like how in C and C++ programming, programmers needed to pay meticulous attention to memory cleanup. Something Java programmers don't need to do, and now Java is much more prevalent.
• Major considerations for the selector are:
  • access the data fast and using the least energy
  • don't alter the data being accessed
  • don't interfere with data in adjacent cells (this is where the term "leakage" comes into play.
  • make the data accessed as small as possible - a single bit is preferable.
  • add minimal overhead.

I'd say a seamless selector will be the icing on the cake for customer uptake of ReRAM, as per my C/C++ and Java analogy above.

Perfect, thank you very much!
By the way, in the BRN group I noticed a post today what it would be like with BRN and WBT. The post refers to the 22nm in both.
https://thestockexchange.com.au/threads/brn-discussion-ongoing.1/post-236787

Maybe you can go into it again there with your knowledge? That would also interest me.

 

[Slymeat]

Perfect, thank you very much!
By the way, in the BRN group I noticed a post today what it would be like with BRN and WBT. The post refers to the 22nm in both.
https://thestockexchange.com.au/threads/brn-discussion-ongoing.1/post-236787

Maybe you can go into it again there with your knowledge? That would also interest me.

I planted my seed when both had 28nm implementations. Both at 22nm opens even more doors with them both involved.

The size architecture opens doors for SOC implementations in those sizes. So if someone is working at 22nm and need some Akida IP they can purchase a licence, and ditto for if they need non-volatile data storage and Weebit’s ReRAM. You can have a system that learns on the fly, stores what it learns to ReRAM, and that info can survive a power cycle. Hence less power consumption between times when it is not needed. Rather than sleep, it can actually power off. Perfect for at the edge.

Having Akida and ReRAM on the same chip as the rest of the implementation has so many advantages, one huge one being no interface bus which improves speed, power efficiency, and security. Plus it is easier to plug a self-contained chip into a circuit board than have to design in all the necessary connections, power supplies, etc.

 

[Slymeat]

Coby Hanoch posted on linked in, today, about the growth he has seen in his 5 year tenure at Weebit Nano. What a great asset he has proven to be for Weebit Nano. And he is still thinking he has a lot of important work to be done “now there is just that little thing called delivering on these high expectations”

Now, for fellow BrainChip Holders, let’s hope Sean Heir can boast 100x growth in 4 years time (4 plus his already served year to make a comparable 5 year tenure)

“Today is a special day for me at Weebit Nano Ltd.​

When I joined, a bit over 5 years ago, the market cap of the company was A$11M. During the trading today we crossed the A$1.1B market cap, a 100X growth! This past week we also became a “Kangacorn” (my invention – an Australian unicorn).​

I would like to thank the amazing Weebit team that has been doing such an amazing job (and coping with me ), my stellar supporting board, and most of all – the truly amazing shareholders who stayed with us throughout the tough times and have been supporting us all these years.​

Of course, now there is just that little thing called delivering on these high expectations… . If there is any team that can deliver on this, it is the incredible Weebit R&D team, which has met all its technical milestones up to now, the great sales and marketing team we are assembling, and the whole eco-system of friends and partners supporting us.​

Thank you all for getting us to this point, and I know we will have so much fun taking Weebit to the next level together!”​

 

[Pappagallo]

Coby Hanoch posted on linked in, today, about the growth he has seen in his 5 year tenure at Weebit Nano. What a great asset he has proven to be for Weebit Nano. And he is still thinking he has a lot of important work to be done “now there is just that little thing called delivering on these high expectations”

Now, for fellow BrainChip Holders, let’s hope Sean Heir can boast 100x growth in 4 years time (4 plus his already served year to make a comparable 5 year tenure)

“Today is a special day for me at Weebit Nano Ltd.​

When I joined, a bit over 5 years ago, the market cap of the company was A$11M. During the trading today we crossed the A$1.1B market cap, a 100X growth! This past week we also became a “Kangacorn” (my invention – an Australian unicorn).​

I would like to thank the amazing Weebit team that has been doing such an amazing job (and coping with me ), my stellar supporting board, and most of all – the truly amazing shareholders who stayed with us throughout the tough times and have been supporting us all these years.​

Of course, now there is just that little thing called delivering on these high expectations… . If there is any team that can deliver on this, it is the incredible Weebit R&D team, which has met all its technical milestones up to now, the great sales and marketing team we are assembling, and the whole eco-system of friends and partners supporting us.​

Thank you all for getting us to this point, and I know we will have so much fun taking Weebit to the next level together!”​

100x is a lot harder when your starting point is already $1B! I mean I wouldn’t say it’s impossible but it’s certainly improbable within 4 years especially when you consider the long lead time for product development and the subsequent flow of royalties. I think 10x-20x is more realistic in this timeframe if/when the “explosion of sales” happens.

 

[Slymeat]

100x is a lot harder when your starting point is already $1B! I mean I wouldn’t say it’s impossible but it’s certainly improbable within 4 years especially when you consider the long lead time for product development and the subsequent flow of royalties. I think 10x-20x is more realistic in this timeframe if/when the “explosion of sales” happens.

My comment WRT Sean Heir was VERY MUCH tongue in cheek.

I do appreciate a CEO who actively markets his company.

 

[Pappagallo]

My comment WRT Sean Heir was VERY MUCH tongue in cheek.

I do appreciate a CEO who actively markets his company.

Sorry it was early, forgot to turn on my sarcasm detector.

I agree great words from Coby. He has confidence coming out of his arse atm.

 

[cosors]