BRN Discussion Ongoing

Interesting isn't FF, as soon as the share price slides it doesn't take long to discover who's a daily holder, who's a monthly holder, who's an annual holder and you and I are among the rest...the ones who do trade at times, the ones who know the technology as good as the next educated holder, the ones who have developed mutually positive relationships with the key staff, as mentioned last week....

My senses were telling me, June was the month that the share price was going to be tested, and it didn't take long for the shareholders whom haven't done any of their own research to start frothing at the mouth.

As a number of posters have already commented, I agree, when the 2nd quarter figures are released in around 7 weeks time, I'm not expecting to see any revenue (of any sorts).

AND....without Peter and ALL of his brilliant handpicked, highly educated, highly qualified staff, well, Brainchip Holdings ltd simply wouldn't be Brainchip Holdings Ltd.

I do know that our founder is having a well deserved holiday (short) with his wife...and God Bless him, if only you all knew of the amount of work he puts into our company to deliver us a successful company, I certainly couldn't match him and I'm personally eternally grateful.

For the shareholders whom have a comfortable parcel of shares, well, good on you, try stop watching the market so closely, be happy with what you've got and keep researching quietly each week, our company will deliver, as they have on every key milestone to date.

Brainchip.......Share the Love :love:

Tech x :geek:
I hear you brother
I just had to pick up a mother parcel of shares today ist a beautiful journey so far.
 
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This looks exciting!

NASA has shared details of its new all-electric plane that is set to take off to the sky. The plane is designed to run fully on electric batteries, departing from the tradition of fuel-powered planes. If all goes well, this will be the first step toward achieving a cleaner, cheaper, and quieter future for aviation.

What do you think about an electric plane? Would you feel comfortable travelling on one?

Read the full detail here - https://lnkd.in/ghs2MD_k
 
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Slymeat

Move on, nothing to see.
I do believe BrainChip need to pursue talks with WeebitNano with earnest, and it may not be merely to discuss using ReRAM for non-volatile memory!

The following was stated by Eran Briman, Weebit Nano’s VP of marketing and business development, in an interview today:


Where do you see ReRAM going in the future?

Eran:
As discussed, there is a broad and growing opportunity for ReRAM to replace flash across a broad range of applications. A bit longer term, one of the exciting opportunities is in neuromorphic computing where ReRAM isn’t acting as a traditional NVM, but also as a computing element. Today’s AI uses artificial neural networks to simulate brain function, but with neuromorphic computing, we’re talking about true brain inspired AI systems. Since a ReRAM cell physically resembles a biological synapse, it has functional similarities as well. This means that emulating neural networks with ReRAM consumes orders of magnitude less power than today’s neural network simulations.

Weebit has been working for several years with a number of global academic institutions toward ReRAM-based neuromorphic computing. A couple of years ago, together with our development partner CEA-Leti, we were the first to demonstrate ReRAM based spiking neural networks, and now we’re working on the next generation of this. Industry-wide, we’re starting to see neuromorphic developments moving from academia into commercial companies – both established and startups. With this move, ReRAM-based neuromorphic computing might be closer than people think.”
 
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KiNi1996

Emerged
Regarding the renesas statement from the 27th of may ("... we have added ...spiking neural network with BrainChip core licensed for selected applications – we have licensed what we need to license from BrainChip including the software to get the ball rolling.”)

What do you guys think, what is the order of magnitude of the revenue generated by the sale of these licenses? The highest revenue so far (2021 1,6M$) was still quite low. My hope is that a significantly higher amount will be shown in the next quarters in order to be able to justify the high market cap of BRN more and more.
Sorry if this question has already been asked. Thanks you guys for alway keeping us up to date!!!
 
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BaconLover

Founding Member
I do believe BrainChip need to pursue talks with WeebitNano with earnest, and it may not be merely to discuss using ReRAM for non-volatile memory!

The following was stated by Eran Briman, Weebit Nano’s VP of marketing and business development, in an interview today:


Where do you see ReRAM going in the future?

Eran:
As discussed, there is a broad and growing opportunity for ReRAM to replace flash across a broad range of applications. A bit longer term, one of the exciting opportunities is in neuromorphic computing where ReRAM isn’t acting as a traditional NVM, but also as a computing element. Today’s AI uses artificial neural networks to simulate brain function, but with neuromorphic computing, we’re talking about true brain inspired AI systems. Since a ReRAM cell physically resembles a biological synapse, it has functional similarities as well. This means that emulating neural networks with ReRAM consumes orders of magnitude less power than today’s neural network simulations.

Weebit has been working for several years with a number of global academic institutions toward ReRAM-based neuromorphic computing. A couple of years ago, together with our development partner CEA-Leti, we were the first to demonstrate ReRAM based spiking neural networks, and now we’re working on the next generation of this. Industry-wide, we’re starting to see neuromorphic developments moving from academia into commercial companies – both established and startups. With this move, ReRAM-based neuromorphic computing might be closer than people think.”
As an IP company, what's Brainchip going to do with pursuing talks with WBT?
I don't see how this relation will help BRN now that they're concentrating on selling IP. Just my opinion, may be there are use cases with benefits to both companies.
 
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mcm

Regular
I do believe BrainChip need to pursue talks with WeebitNano with earnest, and it may not be merely to discuss using ReRAM for non-volatile memory!

The following was stated by Eran Briman, Weebit Nano’s VP of marketing and business development, in an interview today:


Where do you see ReRAM going in the future?

Eran:
As discussed, there is a broad and growing opportunity for ReRAM to replace flash across a broad range of applications. A bit longer term, one of the exciting opportunities is in neuromorphic computing where ReRAM isn’t acting as a traditional NVM, but also as a computing element. Today’s AI uses artificial neural networks to simulate brain function, but with neuromorphic computing, we’re talking about true brain inspired AI systems. Since a ReRAM cell physically resembles a biological synapse, it has functional similarities as well. This means that emulating neural networks with ReRAM consumes orders of magnitude less power than today’s neural network simulations.

Weebit has been working for several years with a number of global academic institutions toward ReRAM-based neuromorphic computing. A couple of years ago, together with our development partner CEA-Leti, we were the first to demonstrate ReRAM based spiking neural networks, and now we’re working on the next generation of this. Industry-wide, we’re starting to see neuromorphic developments moving from academia into commercial companies – both established and startups. With this move, ReRAM-based neuromorphic computing might be closer than people think.”
Weebit Nano’s Re-RAM memory chip is the front runner to replace Flash and will be mass produced by SkyWater in the US early next year once the transfer of Weebit’s tech to its fab. and qualification of it, is complete.
No question in my mind that BRN should be speaking with Coby Hanoch, the CEO of Weebit …. or the founder and Chairman, Dadi Perlmutter, who used to be known as Mr Pentium, and for many years was the No. 2 person at Intel.
WBT, like BRN, is in the process of commercialising its tech and has an awesome future ahead of it … and the 2 companies collaborating could be a match made in heaven.
 
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projection

Member
Cheers
 
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I agree wholeheartedly with what you have said. Not that I would put anyone through the experience but I posted basically the same thing on HC in 2017 and was ridiculed by a couple of Richard Craniums.

I also posted here before the AGM took place that all my communications to that point with the current team were via email as I want a record to go back to if I think there is an inconsistency.

I had a brief conversation with Mr. Dinardo at the 2019 AGM to clarify something he said during his presentation.

Very few people are clever enough to give a consistent version unless it is something they believe over a couple of hours under examination but to do so over months and years takes an extraordinary memory and pathology.

As they say sometimes meeting your hero’s can be a disappointment but while the team at Brainchip are not quite my hero’s the limited interaction I had with them at and after this recent AGM did not disappoint.

It has taken me from 2016 to 2022 to be comfortable with creating a more personal engagement but email is still my preference.

My opinion only DYOR
FF

AKIDA BALLISTA
And the good thing is, I have positions in 10 of them.

I love finding stuff that isn’t well known.
I just went through that article and found i am a holder of many of these stocks lol
 
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Diogenese

Top 20
I do believe BrainChip need to pursue talks with WeebitNano with earnest, and it may not be merely to discuss using ReRAM for non-volatile memory!

The following was stated by Eran Briman, Weebit Nano’s VP of marketing and business development, in an interview today:


Where do you see ReRAM going in the future?

Eran:
As discussed, there is a broad and growing opportunity for ReRAM to replace flash across a broad range of applications. A bit longer term, one of the exciting opportunities is in neuromorphic computing where ReRAM isn’t acting as a traditional NVM, but also as a computing element. Today’s AI uses artificial neural networks to simulate brain function, but with neuromorphic computing, we’re talking about true brain inspired AI systems. Since a ReRAM cell physically resembles a biological synapse, it has functional similarities as well. This means that emulating neural networks with ReRAM consumes orders of magnitude less power than today’s neural network simulations.

Weebit has been working for several years with a number of global academic institutions toward ReRAM-based neuromorphic computing. A couple of years ago, together with our development partner CEA-Leti, we were the first to demonstrate ReRAM based spiking neural networks, and now we’re working on the next generation of this. Industry-wide, we’re starting to see neuromorphic developments moving from academia into commercial companies – both established and startups. With this move, ReRAM-based neuromorphic computing might be closer than people think.”
Hi Slymeat,

ReRAM SNNs are theoretically closer analogs to neuron/synapses than Akida's digital SNN.

However, there are major practical difficulties in implementing ReRAM neurons because of the inherent variability in manufacturing and "quantum" uncertainty in the performance of analog neurons:


WO2021110807A1 METHOD FOR RESETTING AN ARRAY OF RESISTIVE MEMORY CELLS


1654697680654.png



Arrays of RM cells suffer from variability in the resistance value associated to HRS [high resistance state]. Figure 1 shows the distribution of the measured electric resistances for HRS and LRS [low resistance state] in a ReRAM array after different number of cycles. This figure shows on the vertical axis the percentile of RM cells having a measured electrical resistance, represented on the horizontal axis. It is evident that, when in the HRS, memory points can have different resistance values and that the variability of the values RHRS is much higher than the variability of the values LLRS. The large spreading of HRS leads to difficulties in distinguishing the two HRS and LRS states, and thus correction techniques are required to narrow the distribution of resistance values in the array. In other words, RM arrays in which the FIRS and LRS states are not clearly distinguished may lead to errors in reading the array states and thus to RM arrays that are not reliable.

The WeeBit solution seems a bit hit and miss:

To at least partially solve the technical problems mentioned above, the present invention discloses a method for resetting an array of Resistive Memory cells by applying a sequence of N reset operations, N being an integer number greater than 2, said method comprising the following steps:

- at the first reset operation, performing the first reset operation by applying the reset technique having the highest relative programming yield;

- at the j-th reset operation of the N-1 subsequent reset operations, j being an integer number comprised between 2 and N, defining a reset technique to be used at the j-th reset operation and performing the j-th reset operation
.


Here is a WeeBit presentation for their ReRAM NN:

https://weebit-nano.com/wp-content/...ated hardware ReRAMscan be used to implement:


1654698227632.png



Note they use rate-based spike coding, which BrainChip discarded in preference to rank-based spike coding.

Also it's a bit hard to judge WeeBit's attitude to machine learning, which they classify as "not brain-inspire", presumably meaning the pre-Akida software techniques for "machine learning".

1654698439007.png




None of the 10 WeeBit patents I found address the compute-in-memory implementation.

https://worldwide.espacenet.com/patent/search?q=pa = "weebit"
 
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Not aware if posted already.

Just found interesting and highlighted a few points.

ARM Renesas Quinella? :ROFLMAO:



New Products | June 8, 2022
ARM has developed a configurable image signal processor core for embedded and surveillance chips. The Mali-C55 is the company’s smallest and most configurable ISP core and has been licensed to Renesas Electronics. ARM battles RISC-V at Renesas Three AI smart city trials start in Rome The Mali-C55 core…
By Nick Flaherty

Share:


ARM has developed a configurable image signal processor core for embedded and surveillance chips.

The Mali-C55 is the company’s smallest and most configurable ISP core and has been licensed to Renesas Electronics.
The Mali-C55 core improves the image quality under a wide range of different lighting and weather conditions, and is designed to enable maximum performance and capability in area and power constrained applications, making it ideal for smart camera and edge AI vision use cases. It is also aimed at augmented reality (AR/VR) applications and smart displays.

The core supports up to 8 separate inputs and image resolutions up to 8K and a maximum image size up to 48 megapixels (MP), the Mali-C55 offers the most efficient combination of image quality, throughput, power consumption and silicon area.


The core builds on the previous Mali-C52 ISP, with improved tone mapping and spatial noise reduction, enhanced support for high dynamic range (HDR) sensors and seamless integration with machine learning accelerators to take advantage of neural networks for various de-noising techniques. By combining multiple Mali-C55 ISPs, larger image sizes can be achieved for applications that require greater than 48 MP capabilities, such as video conferencing.

For embedded and IoT vision applications, silicon footprint and cost are important factors, the Mali-C55 can be half of the silicon area size of previous generations and significantly lowers power consumption for extended battery life.

The core integrates with ARM Cortex-A or Cortex-M cores and machine learning accelerators for AI applications via AXI and AHB interfaces. The Mali-C55 provides a second output pipe that can output downscaled images suitable for input to any machine learning accelerator.

The added Iridix local tone mapping applies intensity transformations to images to achieve better visualization by using information gathered from local regions within images. Iridix defines these local regions in an image as grids with equal sizes. It extracts statistics from each grid to apply the collected statistics to the corresponding local regions in the image. Compared to Mali-C52, Mali-C55 improves the Iridix local tone mapping algorithm by smoothing each local tone curve therefore enabling a more natural fall-off around bright light sources.

Temper is a temporal noise reduction algorithm that improves the quality of images in low light conditions by combining consecutive frames. Mali-C55 not only improves the image quality with updated noise reduction algorithms but achieves this with up to 50% reduced memory bandwidth compared to Mali-C52.

Sinter 2.6 is an improved spatial noise reduction technique that improves the detail and noise balance in colour channels. Compared to Mali-C52, Mali-C55’s Sinter achieves better balance of detail by using specific registers for each colour channel.

The Temper and Sinter functional blocks were designed to work together for a significantly better image quality by sharing information between the modules to apply stronger noise reduction in various regions. The Temper and Sinter block order is switched in the pipeline compared with previous ISP designs. This way the input motion mask from Temper improves the overall motion-adaptive noise-reduction performance, while providing per-plane noise profiling.

For computer vision applications where high throughput and low latency is required, the Mali-C55 ISP can be configured by either enabling or disabling these features.

A complete software package is available for Mali-C55 licensees for controlling the ISP, Sensor Auto White Balance, Auto-Focus, and Auto Exposure as well as Bare-metal support and Linux (Video4Linux framework – V4L2).

ISP users also need the capability to tune both objectively and subjectively, and ARM provides a full set of tuning and calibration tools.

ARM also offers a bit-exact simulation model along with a reference platform, which enables the pre-built and pre-tuned evaluation of Mali-C55 image quality. ARM plans to include Mali-C55 in upcoming Total Solutions for IoT, starting with a full reference design for vision systems. This will come with a pre-validated solution that will support a specific sensor and dual output mode which seamlessly connect to a machine learning accelerator that performs various functions.
 
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Had to have a captain cook at the other site and it never fails😂 first post I read is always some sort of moronic garbage. Won't link it here as I don't won't to shitstain this site. But it was from The Dean. Posting some crapola about BRN being listed in 2011. https://www.intelligentinvestor.com.au/shares/asx-brn/brainchip-holdings-ltd/float
I give up and just have to except their are really stupid people in this world.
Intelligent investor my arse!
 
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Had to have a captain cook at the other site and it never fails😂 first post I read is always some sort of moronic garbage. Won't link it hear as I don't won't to shitstain this site. But it was from The Dean. Posting some crapola about BRN being listed in 2011. https://www.intelligentinvestor.com.au/shares/asx-brn/brainchip-holdings-ltd/float
I give up and just have to except their are really stupid people in this world.
Yep....I was over there for awhile going toe to toe with Sackman as I call him bagging him for his "dot joining" on Chapa move and painting a negative slant as usual.

I will post this bit as one of his last comments to me haha

"Your logic is extremely difficult to follow."

Poor soul :ROFLMAO:

Even TDH (The D*ck Head) as I call him...signs posts as TD sometimes...tried to hop in and quote me but just ignore him these days.
 
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Yep....I was over there for awhile going toe to toe with Sackman as I call him bagging him for his "dot joining" on Chapa move and painting a negative slant as usual.

I will post this bit as one of his last comments to me haha

"Your logic is extremely difficult to follow."

Poor soul :ROFLMAO:

Even TDH (The D*ck Head) as I call him...signs posts as TD sometimes...tried to hop in and quote me but just ignore him these days.
Haha. Last two dumbass posts I've have seen have been from Dickbrain and The dickhead 😂
 
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cosors

👀

"ZF Friedrichshafen establishes new technology center in India​

03-Jun-2022 13:23 GMT
News
Investments
Rohan Hazarika
The technology center is growing, with plans to hire more people

Global technology company ZF Friedrichshafen has announced the establishment of a new technology center in Hyderabad, India, according to a report published by The Hindu on 1 June 2022." ;)

Does not have to mean anything. But I find all three in one place interesting (Brainchip/MosChip/ZF). It's not new for ZF, they have over 12,000 employees in India. For the new center they have dozens of pages full of job offers.
 
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Slymeat

Move on, nothing to see.
As an IP company, what's Brainchip going to do with pursuing talks with WBT?
I don't see how this relation will help BRN now that they're concentrating on selling IP. Just my opinion, may be there are use cases with benefits to both companies.
I was thinking that BrainChip IP + WeebitNano IP may be a more marketable IP = neuromorphic plus nonvolatile storage that marries naturally.
 
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Slymeat

Move on, nothing to see.
Hi Slymeat,

ReRAM SNNs are theoretically closer analogs to neuron/synapses than Akida's digital SNN.

However, there are major practical difficulties in implementing ReRAM neurons because of the inherent variability in manufacturing and "quantum" uncertainty in the performance of analog neurons:


WO2021110807A1 METHOD FOR RESETTING AN ARRAY OF RESISTIVE MEMORY CELLS


View attachment 8792


Arrays of RM cells suffer from variability in the resistance value associated to HRS [high resistance state]. Figure 1 shows the distribution of the measured electric resistances for HRS and LRS [low resistance state] in a ReRAM array after different number of cycles. This figure shows on the vertical axis the percentile of RM cells having a measured electrical resistance, represented on the horizontal axis. It is evident that, when in the HRS, memory points can have different resistance values and that the variability of the values RHRS is much higher than the variability of the values LLRS. The large spreading of HRS leads to difficulties in distinguishing the two HRS and LRS states, and thus correction techniques are required to narrow the distribution of resistance values in the array. In other words, RM arrays in which the FIRS and LRS states are not clearly distinguished may lead to errors in reading the array states and thus to RM arrays that are not reliable.

The WeeBit solution seems a bit hit and miss:

To at least partially solve the technical problems mentioned above, the present invention discloses a method for resetting an array of Resistive Memory cells by applying a sequence of N reset operations, N being an integer number greater than 2, said method comprising the following steps:

- at the first reset operation, performing the first reset operation by applying the reset technique having the highest relative programming yield;

- at the j-th reset operation of the N-1 subsequent reset operations, j being an integer number comprised between 2 and N, defining a reset technique to be used at the j-th reset operation and performing the j-th reset operation
.


Here is a WeeBit presentation for their ReRAM NN:

https://weebit-nano.com/wp-content/uploads/2021/05/Weebit-Nano-to-present-Implementing-Neural-Network-Synapses-with-ReRAM-at-Flash-Memory-Summit_PDF.pdf#:~:text=Weebit –Leti demonstrates 1st ever analog spiking neurons,efficient AI-dedicated hardware ReRAMscan be used to implement:


View attachment 8796


Note they use rate-based spike coding, which BrainChip discarded in preference to rank-based spike coding.

Also it's a bit hard to judge WeeBit's attitude to machine learning, which they classify as "not brain-inspire", presumably meaning the pre-Akida software techniques for "machine learning".

View attachment 8797



None of the 10 WeeBit patents I found address the compute-in-memory implementation.

https://worldwide.espacenet.com/patent/search?q=pa = "weebit"
Thanks @Diogense, above and beyond with a very thorough response as usual.
 
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Bloody amazing what this gentleman is connected to.
Screenshot_20220609-025306.png
 
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cosors

👀
Yep....I was over there for awhile going toe to toe with Sackman as I call him bagging him for his "dot joining" on Chapa move and painting a negative slant as usual.

I will post this bit as one of his last comments to me haha

"Your logic is extremely difficult to follow."

Poor soul :ROFLMAO:

Even TDH (The D*ck Head) as I call him...signs posts as TD sometimes...tried to hop in and quote me but just ignore him these days.
When reading I have the feeling that you are the cat that plays with a mouse like prey. Only the mouse is ambivalent plays different roles and for it it is extremely difficult to understand that it is the mouse because it feels as a cat and circles as mouse perplexed in front of the cat's snout. Thou shalt not play with food :ROFLMAO:
 
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M_C

Founding Member
Screenshot_20220609-055226_LinkedIn.jpg






.https://www.arm.com/company/news/2022/06/arm-introduces-new-isp-to-advance-vision-systems-for-iot-and-embedded-markets?utm_source=linkedin&utm_medium=social&utm_campaign=2022_embiot-lowp_mk02_arm_na_na_na&utm_content=newsroom

News highlights:

  • Arm Mali-C55 is the smallest and most configurable image signal processor from Arm, already seeing success with licensees such as Renesas
  • Delivers improved image quality and higher performance for advanced embedded and IoT vision systems with half the silicon area of previous generations
  • Multi-camera high resolution support and seamless integration for more machine learning on-device offers new capabilities for silicon partners and OEMs
 
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