White Horse
Regular
Hi FF,
However, this is a black and white statement from their website. Hence either factual or misleading.
It will be interesting to see what our sleuths have to say.
BRN Discussion Ongoing
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However, this is a black and white statement from their website. Hence either factual or misleading.
It will be interesting to see what our sleuths have to say.
Hi FF,
I was caught short on this development by Imec.
Imec are using in-memory computing:
EP3671748A1 IN-MEMORY COMPUTING FOR MACHINE LEARNING
[0009] Operations on multiple stored values in the array going beyond bitwise logic functions can be implemented, in particular reduction operations, including summation, can be obtained by in-memory processing. No dedicated external unit is then needed or this unit may require less performance. This is particularly interesting for binary neural network applications for which the matrix-vector multiplications conventionally carried out by MAC units can be achieved by multiple in-memory XNOR products, followed by a subsequent in-memory summation.
[0047] In-memory processing, in the context of the present invention, refers to a memory structure, such as an array or a plurality of sub-arrays comprising memory cells, which also comprises processing logic or processing functionality on stored data bits. In contrast to near memory computing or conventional memory structures which are not in-memory processing, the requested data is not only read and communicated to an external processing unit, but is already modified or processed as of the moment it is sent out of the memory structure. In exemplary embodiments processing of requested data bits, before communicating the results to peripheral further processing units, may include bitwise Boolean operations such as, but not limited to XOR and/or XNOR multiplication of pairs of requested data bits or addition of one or more requested data bits or intermediate functional results thereof. In-memory processing is highly desirable for fast and energy-efficient computing hardware as it is mitigating the von Neumann bottleneck. Having a processing unit waiting for unprocessed fetched data from memory before it can start processing it is often an inefficient use of the available resources and bandwidth. Therefore, a limiting the amount of raw data communicated to the processing unit and sending (pre-) processed data to the processing unit instead, is providing a more efficient use of the available resources and bandwidth. Whereas near memory computing tries to limit the length of data paths from the memory structure to a nearby processing logic, in-memory processing goes one step further by incorporating the processing logic directly into the memory structure.
In-memory computing for 1-bit weights and actuations (SNN) are carried out by simple logic gates and an adder.
The title of the patent refers to learning, but I haven't got to that bit yet, as I need to post this retraction of my earlier post asap.
IBM still thinks in-memory compute means MemRistors:
In-memory computing
At IBM Research, we’re inventing what’s next in AI, quantum computing, and hybrid cloud to shape the world ahead.
In-memory computing could be a significant first step towards non-von Neumann computing. Here the key idea is to perform certain tasks, such as bit-wise operations and arithmetic operations, in memory. We call such a memory unit computational memory, where resistive memory devices, in particular phase-change memory (PCM) devices, could play an important role as building blocks. We have found that, if data is stored in PCM devices, the physical attributes of those devices can be exploited to achieve in-place computation. When organized in a cross-bar array, PCM devices can be used to perform matrix-vector multiplications with very low computational complexity. An application of this concept is the problem of compressed sensing.
Imec uses standard silicon logic gates.
D
Deleted member 118
Guest
@Fact Finder an early morning Sunday read or 2 to go with ya cuppa tea and slice off toast with strawberry jam.
www.csis.org
www.nationaldefensemagazine.org
www.newyorker.com
Navigating Emerging Technology and Evolving Threats in the U.S.-Australia Alliance
At a time when regional states see growing instability and are concerned about their place in an increasingly tense region, the U.S.-Australia alliance has an opportunity to lead by example.
Surface Navy Building Digital Infrastructure to Harness AI
Surface Navy Building Digital Infrastructure to Harness AI
The Rise of A.I. Fighter Pilots
Artificial intelligence is being taught to fly warplanes. Can the technology be trusted?
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TheFunkMachine
seeds have the potential to become trees.
That’s a great list Esq!
Thanks for putting that together. If I where to add anything to that list I would put the next “this is our mission” podcast with Megachips on there
I think it is the 3rd of May
Morning TFM,That’s a great list Esq!
Thanks for putting that together. If I where to add anything to that list I would put the next “this is our mission” podcast with Megachips on there
I think it is the 3rd of May
Cheers, just added.
Esq.
D
Deleted member 118
Guest
You’ve missed the May 20th off the list and one off the most important events ever.
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Space Cadet
Regular
See this is being held in Poland. Maybe Anil can attend, take a few AKD1000 chips with him, smuggle then across the border to Ukraine and they can put them in numerous weaponry and put Putin on his arse and then the world can get back to its ordinary malfunctioning chaotic self.An workshop coming up with Heinrich Gotzig from Valeo who will be chairing
NeuroEng 2022 Workshop | EBCCSP'2022 Conference
NeuroEng Workshop First International Workshop on Event Sensing and Neuromorphic Engineering NeuroEng 2022 Technical focus The aim of the International Workshop on Event Sensors and Neuromorphic Engineering is to provide a platform for the research communities to exchange new ideas and research...ebccsp2022.org
Topics of interest include, but are not limited to:
- event-based sensing,
- event-based neuromorphic engineering,
- event-driven
- vision, event-driven audio,
- event-based olfactory systems,
- event-driven robot skin,
- event-based information processing,
- event-based motion detection and integration,
- spiking neural networks,
- edge computing,
- address-event representation,
- visual recognition,
- depth estimation,
- real-time algorithms,
- motion estimation,
- object tracking,
- sensor fusion.
SC
D
Deleted member 118
Guest
Close but not close enough
The Imec patent application has been abandoned.
D
Deleted member 118
Guest
Food4 thought
Regular
Fact Finder
Top 20
Just to be clear it is EP3671748A1 IN-MEMORY COMPUTING FOR MACHINE LEARNING that has been abandoned.
Does that then mean IMEC only have as far as we know the original patent for an analog SNN?
Many thanks @Diogenese
My opinion only DYOR
FF
AKIDA BALLISTA
Cyw
Regular
I have this robot vacuum but it is pretty dumb in avoiding obstacles. It has to hit the obstacle before changing directions. Ecovacs (Chinese company listed in Shanghai) release the new omni robovac that has LiDAR for smart navigation. Wonder if they are using Magikeye? What AI visual sensor processor is available now other than AKIDA?
Deebot X1-Omni
Fact Finder
Top 20
This is the link to IMEC’s website. I cannot find other than an analogue SNN chip that appears to have been fabricate in 2020. It is not an easy site to navigate so others might like to look as well:
www.imec-int.com
My opinion only DYOR
FF
AKIDA BALLISTA
Imec R&D, nano electronics and digital technologies
Imec is the world-leading R&D and innovation hub in nanoelectronics and digital technologies.
My opinion only DYOR
FF
AKIDA BALLISTA
Bravo
If ARM was an arm, BRN would be its biceps💪!
Hi FF,
It would be funny if this is the case since the press release I posted states "Contrary to analog SNN implementations, imec’s event-driven digital design makes the chip behave exactly and repeatedly as predicted by the neural network simulation tools."
If they had to abandon the new patent and go back to analogue then they have shot themselves in the foot by this admission. The press release was dated the 28 April 2020 (if this helps) and it's an interesting read, especially the list of use cases.
Here's the original post: #9,890
Space Cadet
Regular
Maybe they abandoned the digital version because there was a cheap superior one already available lol
SC
Fact Finder
Top 20
I did not request their White Paper which provides on the description a roadmap towards Ai at the Edge. It does by implication suggest that they are saying in 2022 that they are not yet where they were claiming to be in 2020.
I did not see anyone limping on the website but they could still be off undergoing rehab to learn how to walk with a hole in their foot.
My opinion only DYOR
FF
AKIDA BALLISTA
Bravo
If ARM was an arm, BRN would be its biceps💪!
Here's something from Imec's Reading Room posted 31 May 2021. This includes a lot more technical information in which imec refer to adaptive neurons. Perhaps @Diogenese could take a look.
In April 2020, imec introduced the world’s first chip to process radar signals using a spiking recurrent neural network (SNN). Its flagship use-case? The creation of a smart, low-power multi-sensor perception system for drones that identifies obstacles in a matter of milliseconds.
Contrary to the artificial neural networks that are a key ingredient of today’s robotics perception systems, SNNs mimic the way groups of biological neurons operate – firing electrical pulses sparsely over time, and, in the case of biological sensory neurons, only when the sensory input changes. It is an approach that comes with important benefits: at the time of the announcement, imec’s SNN chip showed to consume up to a hundred times less power than traditional implementations while featuring a tenfold reduction in latency – enabling almost instantaneous decision-making.
In the following article, Ilja Ocket – program manager of neuromorphic sensing at imec – provides more insights into some of imec’s recent advances in this domain.
Optimizing and scaling up the original SNN chip
In the last year, imec has been optimizing and scaling up its original SNN chip – the details of which were recently published in ‘Frontiers in Neuroscience’ – to host a variety of (IoT and autonomous robotics) use-cases. The chip builds on an entirely event-based digital architecture, and was implemented in low-cost 40nm CMOS technology. It supports event-driven processing and relies on local on-demand oscillators and a novel delay-cell to avoid the use of a global clock. Moreover, it does not exploit separate memory blocks; instead, memory and computation are co-localized in the IC area to avoid data access and energy overheads.Imec’s SNN ranks amongst the top performers in terms of inference accuracy
Meanwhile, research with the Dutch national research institute for mathematics and computer science (CWI), confirms that spiking neurons with adaptive thresholds can be trained to achieve top-notch inference accuracy. A comprehensive study conducted by imec and CWI aimed to benchmark SNNs using adaptive neurons against six other neural networks. To do so, eight different data sets were used – including Google’s radar (SoLi) and Google’s speech datasets. The study clearly pointed out that SNNs using neurons with adaptive thresholds can achieve a low energy consumption, but not at the expense of a decreased inference accuracy. On the contrary: for each of the major data sets used in the study, the imec SNN ranked amongst the top performers in terms of accuracy.
Imec’s adaptive neuron-based SNN (‘Adaptive SRNN’) was evaluated against six other neural networks – using eight different data sets including Google’s radar (SoLi) and Google’s speech datasets.
“SNN technology will find its way in a broad range of use-cases: from smart, self-learning Internet of Things (IoT) devices – such as wearables and brain-computer interface applications – to autonomous drones and robots. But each of those use-cases comes with its own set of requirements”, says Ilja Ocket. “While spiking neural networks for IoT applications should excel at operating within a very small power budget, autonomous drones demand a low-latency SNN that allows them to avoid obstacles quickly and effectively.”
“Addressing those requirements using a one-size-fits-all SNN architecture is extremely challenging. A delicate balance needs to be struck between energy consumption, latency, accuracy, cost (chip area) and scalability. For example, an SNN with the lowest possible energy consumption and latency typically results in an increased chip area – and vice versa. Finding that balance is one of imec’s SNN focus areas.”
Going forward: spiking all the way
Drones are being used in an increasing number of application domains. Still, to improve their level of autonomy and to have them operate in more challenging environments (such as bad weather conditions), their sensing capabilities require yet another boost. According to Ilja Ocket, an end-to-end spiking approach – based on fused neuromorphic radar and camera inputs – might offer a way out.Ilja Ocket: “This obviously makes for a highly energy-efficient and super low latency system. Today, however, in order to connect such cameras to the underlying AI, one still needs to translate their feed into frames – which significantly limits the efficiency gains. That is why we are investigating how the spiking concept can be implemented end-to-end: from the cameras and sensors to the AI engine. We are actually the first ones to do so, with very promising results so far. To that end, we are still looking for companies from across the drone industry – such as OEM drone builders – to join our program and experiment with this exciting technology.”
Imec’s end-to-end spiking approach at work. Local feature detection forms the first layer for a more complex semantic build-up.
Ilja Ocket
Program Manager of Neuromorphic Sensing at imec
Ilja Ocket, Program Manager of Neuromorphic Sensing at imec, aims to develop technologies for autonomous robotics. His focus is on the intersection between advanced sensor developments and neuromorphic compute architectures.
More about these topics:
Artificial intelligence
Radar
Industry 4.0 & robotics
Published on:
31 May 2021
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https://www.imec-int.com/en/articles/imecs-snn-chip-combines-low-latency-energy-consumption-high-inference-accuracy
https://www.imec-int.com/en/reading-room
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