Gies
Regular
When there is revenue, your to late.
BRN Discussion Ongoing
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Kachoo
Regular
I don't get it. I get it and understand the importance of revenue and growth.
I guess some are to fixated for some reason to not see the bigger picture.
Let's put it simple the product works and it works great. It has been proven multiple times.
The revenue is dependant on our product in a product that an end consumer pays $$ for and then we see dollars.
The papers and research collaborations that are comming out on Akida have never come out this fast in our history. SNN is taking the stage also.
So what would logically be next is the build and design of the products. The 2 to 5 years they talk about is the past. You will see faster adoption of SNN and we hope Akida is part of this growth.
People just need to get over the past what PVDM and Louis Said about $$ comming in before they were too early to the party really. This does not mean Akida won't succeed it just ment that end users and partners were not ready to give go full steam ahead.
So yeah all these papers are absolutely relevant to our success.
I found another lead on SNN at the university of Tennessee.
I think I even those positive outlooknposter are waitingnfor the drop of news too but we don't whinge all day.
It amuses me that some people ignore all the posts which shows progress for potential products with akida, and the postings from exhibitions and Edge Impuls and ANT1 etc.
but when someone posts a study from a research team, they scream out “ITS JUST A RESEARCH WHERE IS THE REVENUE???”
It’s kind of weekend comedy thanks for the entertainment
but when someone posts a study from a research team, they scream out “ITS JUST A RESEARCH WHERE IS THE REVENUE???”
It’s kind of weekend comedy thanks for the entertainment
True but it's where it begins, revenue will very likely follow.
We see more and more of those studies meaning the interest/awareness is growing, a very good sign.
If no one are doing research using Akida in some form, we should be very worried.
You don't have to be a rocket scientist to see that, or?
Kachoo
Regular
Absolutely right! All this study and reseach going into Akida SNN is a very very positive sign.
If we were not seeing the universities joining grow or the first 2 dropped Akida it mean the technology is shyte. But the interest is growing.
The reality is IP we are selling IP technology that is quite amazing actually. This will take time as we are not the product developer.
I will say this it's pretty cut clear that Akida is successful 100% all products they produced sold all chips sold and are sold out. It it was crap people would not have bought VVDN boxes all the pcl cards what ever.
If BRN went to sell chips we would have seen much stronger revenues at the start but it's actually possible that these little sales would have pushed off some partners maybe your crowding their space. I don't know.
But seeing 10 to 20 million in revenue compared to 100 million is a big deal 100 million makes the start of a big company. Now I'm nor saying we will make 100 million on a deal but they are looking at a bigger fish.
The complexity of what is being sold is beyond most of our comprehension and even the most knowledgeable here would admit to not knowing the whole commercial cycle. This is alittle more complicated then finding nan ore body digging it up refine it and sell the commodity.
Smoothsailing
Regular
To say it again loud and clear
A study says everything to support BRN
A study is by far the best reassurance for future sales in the millions
Exactly, that is why Sean said they are talking to BRNs' potential customers clients...... and of course the clients of those testing AKIDA.
Earlyrelease
Regular
Imagine you are a builder and you currently use bricks to build houses. You want to use a new material which is totally transformational but need to change your building processes and tradesmen skills. So you sign up for the new product and keep the supplier to a nda so your competition doesn’t sign up at the same time as you. That way if you do it right and the supplier retains the confidence you have in them to keep it quiet then you get a good 6-12mths head start on the rest of my competition. Now take out brick and insert Akida. Then think of first mover advantage. Whilst I would love to have some news what this delay actually means to me is that 2024/25 will see a rapid number of disclosures to market as based on the already great number of dot’s this crew have found and the prolific research papers showing the tech works. There are plenty in my mind looking at our product and their products and trying to work out what they need to do in their own backyard to make Akida blow their competition away in their field of excellence. I am a happy camper. Whilst I was hoping to have retired this year with my holding the year extra work just saved me spending some of the kids inheritance early.
Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel
Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.
Smoothsailing
Regular
Now that’s very interesting
Getupthere
Regular
Qualcomm’s Boom Highlights AI Shift To The Edge — Forbes
In just six months, Qualcomm shares have gone from a 52-week low to an all-time high on the market’s realization that it has the components and technology to play in t...
... and with an Akida 2 front end?View attachment 64245Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel
Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.www.pcgamer.com
Frangipani
Top 20
How about Numem as our mystery customer for the highlighted Customer SoC?!
Ultra-low-power MRAM-based SoC for sensors/AI
Numem and IC’ALPS have designed an SoC with RISC-V processors, 2MBytes of NuRAM and a DSP/AI custom accelerator.
www.eenewseurope.com
Ultra-low-power MRAM-based SoC for sensors/AI
Technology News | May 30, 2024By Jean-Pierre Joosting
MRAM AI RISC-V DSP SOC
Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.
The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.
The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.
“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.
“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.
Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.
www.numem.com
www.icalps.com
Frangipani
Top 20
How about Numem as our mystery customer for the highlighted Customer SoC?!
View attachment 64246
Ultra-low-power MRAM-based SoC for sensors/AI
Numem and IC’ALPS have designed an SoC with RISC-V processors, 2MBytes of NuRAM and a DSP/AI custom accelerator.
Ultra-low-power MRAM-based SoC for sensors/AI
Technology News | May 30, 2024
By Jean-Pierre Joosting
MRAM AI RISC-V DSP SOC
Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.
The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.
The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.
“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.
“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.
Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.
www.numem.com
www.icalps.com
I couldn’t find any info on the numem website, but found the press release on the IC’ALPS website
NUMEM & IC'Alps develop an ultra-low-power SOC
IC'Alps and Numem announce their collaboration on an innovative high-performance low-power Memory subsystem, for Sensor and AI applications
as well as the following when you click on Do you want to know more on this SoC?
It appears the SoC is not fully digital, though
- would that exclude Akida?… analog-digital-asic-solutions/asic-case-studies/low-power-fast-risc-v-based-cpu-for-virtual-reality-device/
Low-power & fast RISC-V-based SoC for Virtual Reality Device
For a Virtual Reality Device, IC'Alps was to perform with the challenging task of a low-power and fast RISC-V CPU
Menu
Low-power & fast RISC-V-based SoC for Virtual Reality Device
Application
Embedding more and more intelligence directly into a Virtual Reality Device (VRD) is the major step that manufacturers are currently taking. Designing an ASIC is one of the safest way to go considering the challenging specifications of such integration: consumption, speed and miniaturization.
Customer request
IC’Alps was responsible for the overall integration of all parts. Particularly, IC’Alps was tasked with the design and test services of a physical implementation of a RISC-V based chip in the advanced and challenging TSMC 16nm FinFET technology node, embedding a new class of resistive RAM.
Challenges
- High application requirements: high speed combined with low power
- MPW shuttle: tight deadline
- 4-partner project: n4 logistical, legal, management and scope of work challenges to address
- From both Customer and Founder, work was to be done in a secure environment matching stringent requirements : isolated network, encrypted exchanges, dedicated server, CCTV …
- 9 RISC-V cores
- Die size: >15mm2
- Chip size: >6x6mm2
- Memory: 50%
- 15M eq Nand2 gates
- 4M instances
Our approach
IC’Alps first performed a technology assessment with a first synthesis on a RTL code PULP platform. The aim was to make sure that the flow was properly set and get a first performance assessment in the targeted technology.
As a hierarchical integration was not possible due to planning constraints, IC’Alps then performed a flattened physical implementation of the chip starting from the RTL netlist delivered by the Front-End (FE) partner, using third-party IPs (Standard cells, IO, memories) and project partner RAM. A flattened floorplan meant project time optimization but at the cost of fewer outputs for which the team had to adjust.
After these first challenges were addressed, the team then moved on to synthesis, P&R, complete Sign-off verifications completing GDSII delivery and MPW scheduled shuttle
Finally, post-layout simulations were performed using FE partner test bench and test vectors for global power assessment before final delivery to the customer.
ASIC features
RISC-V-based CPU
TSMC 16FFC chip
Fast and Low power ASIC
Last edited:
GStocks123
Regular
Sony neuromorphic research intern- Using SNN’s for offline training & event based vision sensing.
Check out this job at Sony Europe:
https://www.linkedin.com/jobs/view/3937713126
Check out this job at Sony Europe:
https://www.linkedin.com/jobs/view/3937713126
Frangipani
Top 20
Germany closed green!I’m scared
Actually,
,
für
.At least not on Tradegate, which is Germany’s most important stock exchange regarding BRN. Low volume on Friday, though.
Now that you’ve addressed your own Angst after mentioning “German angst” three times last month in the context of share price volatility, will you by any chance be covering “Australian angst” the next time BRN closes red on the ASX?
Fullmoonfever
Top 20
Wonder if we get a look in or have had any input here at all?
This paper has just been released and whilst there is no mention of us and the work benefited from some input from Dr's at Numenta (they work with CPUs) after a guest lecture at CMU, there has been some history with Akida and cortical column work at CMU with John Shen et al as per a prev post of mine below for reference.
From memory I think @Diogenese or someone mentioned PVDM had looked at or studied or started on similar but could be mistaken.
Submitted on 20 May 2024]
arxiv.org
semiengineering.com
Some info in the previous post on C3S cortical columns.
thestockexchange.com.au
This paper has just been released and whilst there is no mention of us and the work benefited from some input from Dr's at Numenta (they work with CPUs) after a guest lecture at CMU, there has been some history with Akida and cortical column work at CMU with John Shen et al as per a prev post of mine below for reference.
From memory I think @Diogenese or someone mentioned PVDM had looked at or studied or started on similar but could be mistaken.
Submitted on 20 May 2024]
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding compute demands of AI workloads. Recent neuroscience theory on intelligence suggests that Cortical Columns (CCs) are...
CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)
A technical paper titled “NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors” was published by researchers at Carnegie Mellon University. Abstract: “Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient...
semiengineering.com
Some info in the previous post on C3S cortical columns.
BRN Discussion Ongoing
I took the risk of buying more shares this morning. Shorts are starting to drop and 2.0 is due to be released soon 🤞
thestockexchange.com.au
Sri Lakshmi Vemulapalli
Research Assistant at Neuromorphic Computer Architecture Lab | ECE Graduate Student at Carnegie Mellon University | Seeking full time positions starting immediately.
Carnegie Mellon UniversityCarnegie Mellon University
Carnegie Mellon University
1 year 1 monthTeaching Assistant
Jan 2023 - May 20235 months
Pittsburgh, Pennsylvania, United States
Working as a Teaching Assistant for 18698 - Neural Signal Processing.Research Assistant
Aug 2022 - May 202310 months
Pittsburgh, Pennsylvania, United States
Working as a Research Assistant under Prof. John Shen on a Neural Processor, “Akida” by Brainchip.
- Developing a C3S designs in MetaTF and map to Akida chip.
- Developing a technique for the conversion of CNNs to Spiking Neural Networks (SNN) and designing a framework for Native TNNs.
JDelekto
Regular
From the information I read, I believe this chip will be built using Intel's Foundry Services. Tom's Hardware reported in January this year that Nvidia had chosen Intel to produce H100 GPUs. This is similar to how BrainChip partnered with Intel Foundry Services to be able to manufacture chips with BrainChip's IP, as an alternative to using TSMC.View attachment 64245Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel
Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.
I think it can get confusing because Intel not only does chip design but will now fabricate chips for themselves and others. The article mentioned in that post mentions using both Intel's Foundry services, potentially as an alternative to using TSMC.
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