BRN Discussion Ongoing

[Frangipani]

A new Brains & Machines podcast (and transcript) is out. The latest episode’s guest was Dylan Muir from SynSense:

https://www.eetimes.com/podcasts/synsense-research-head-talks-combined-sensing-processing/

I merely skimmed the transcript - encouragingly, BrainChip gets mentioned a few times during the post-interview discussion, and once again, Ralph Etienne-Cummings makes a reference to our CTO’s earlier robotic research and to the company he founded in 1999, Iguana Robotics.

Here is a transcript excerpt that deals with SynSense’s approach to commercialisation - the original interview was recorded in mid-2023, followed by a brief interview update in March 2024, after SynSense had acquired iniVation.

During the post-interview discussion, not everyone agreed with Dylan Muir’s reasoning that on-chip learning wouldn’t be necessary any time soon:

Which begs the question: Are the folks at SynSense really convinced that on-chip learning isn’t a big deal or is it possibly a case of sour grapes?

Surprisingly, it never gets mentioned that SynSense became a de-facto Chinese company in 2020 (by moving its headquarters from Switzerland to China) and what kind of problems this brings about with regard to commercialisation.

 

[Smoothsailing]

Do we know why Rob left BRN at all or is this still unknown ?.

 

[IloveLamp]

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

www.onsemi.com

 

[7für7]

Do we know why Rob left BRN at all or is this still unknown ?.

I think he wanted to install Japanese toilets in all their offices with akida inside but Sean said no! Very dramatic situation

 

[SharesForBrekky]

Oh wow, how about this from Intel:

Intel's 1500W TDP for Falcon Shores AI processor confirmed — next-gen AI chip consumes more power than Nvidia's B200

It's getting hot in here.

www.tomshardware.com

"Intel's 1500W TDP for Falcon Shores AI processor confirmed — next-gen AI chip consumes more power than Nvidia's B200"

 

[JDelekto]

Oh wow, how about this from Intel:

Intel's 1500W TDP for Falcon Shores AI processor confirmed — next-gen AI chip consumes more power than Nvidia's B200

It's getting hot in here.

www.tomshardware.com

"Intel's 1500W TDP for Falcon Shores AI processor confirmed — next-gen AI chip consumes more power than Nvidia's B200"

If you buy one-hundred of them, they throw in a nuclear power plant for free.

 

[manny100]

The only worry I have is about proxy votes. e.g my shares in my super have vote with Australian super, though I believe they will not the idiots but they can vote against my wishes of my holdings.
Dyor

BRN has canvassed the funds.
They will vote no spill. They likely will vote YES to remuneration as a strike may lead to an SP drop which sees a fall on the value of funds under their control .
Also those controlling voting have big pay jobs and probably have some empathy for their peers at BRN.
IMO there is no chance of a spill.

 

[Bravo]

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

www.onsemi.com

View attachment 63131

Sounds promising @IloveLamp !

 

[HopalongPetrovski]

Is it really the year 2024?...

 

[Kachoo]

9ze and

Do we know why Rob left BRN at all or is this still unknown ?.

We do not but he seams to like the recent BRN LinkedIn post!

 

[Bravo]

As we all know, we've been waiting a loooong time for the launch of Renesas new MCU with AKIDA + 22nm CMOS process with the integration of a software define radio and Bluetooth 5.3 Low Energy.

Now, I don't wish to FREAK anyone out, but I just noticed this Renesas DA14535 Ultra Low Power Bluetooth 5.3 SoC.

Maybe @Diogenese could take a peek for us to see whether this is anything to get excited about?

Could AKIDA be the "SWD interface" which I've circled below?

Here's a link to the data sheet which was uploaded on 1 April 2024.

https://www.renesas.com/us/en/document/dst/da14535-datasheet?r=25467666

DA14535 - SmartBond TINY DA14535 Bluetooth Low Energy 5.3 SoC

The DA14535 is an ultra-low power SoC integrating a 2.4 GHz transceiver and an Arm® Cortex-M0+ microcontroller with 64kB RAM and 12kB OTP memory.

www.renesas.com

 

[Smoothsailing]

9ze and

We do not but he seams to like the recent BRN LinkedIn post!

Yes it’s a good sign, I thought Rob was a good spokes person for BRN

 

[MrNick]

Perhaps Celus are using Akida and needed someone with intimate knowledge of what’s possible. Pure speculation. Partnerships have always been the success mantra. Just ask Melania Trump.

9ze and

We do not but he seams to like the recent BRN LinkedIn post!

 

[Kachoo]

Perhaps Celus are using Akida and needed someone with intimate knowledge of what’s possible. Pure speculation. Partnerships have always been the success mantra. Just ask Melania Trump.

It is a possibility that those leaving will go into products that involve the IP basicly BRN is IP yeah they can build a chip with the IP and Tenns but the reality is it's a processor for the component so all these are possible. If they believed it to be superior to othere they will build out to a product.

 

[Diogenese]

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

Shaping the Future of Mobility: NODAR and onsemi's Visionary Roadmap for Autonomous Driving

www.onsemi.com

View attachment 63131

Hi Ill,

Nodar runs on Nvidia Jetson orin:

https://www.agritechtomorrow.com/ne...al-automation-powered-by-nvidia-jetson/15184/

NODAR Announces Advanced Stereo Vision Technology for Next-Generation Agricultural Automation, Powered by NVIDIA Jetson​

Visit http://www.nodarsensor.com for further information
NODAR's AgriView Revolutionizes the Agriculture Market with State-of-the-Art 3D Vision for Autonomous Farming, Powered by NVIDIA Jetson Orin System-on-Modules
01/09/24, 06:00 AM | Precision Farming
In a significant development for agricultural technology, NODAR announces its next-generation solutions for the farming industry, powered by the NVIDIA Jetson platform for edge AI and robotics.

As we all know, we've been waiting a loooong time for the launch of Renesas new MCU with AKIDA + 22nm CMOS process with the integration of a software define radio and Bluetooth 5.3 Low Energy.

Now, I don't wish to FREAK anyone out, but I just noticed this Renesas DA14535 Ultra Low Power Bluetooth 5.3 SoC.

Maybe @Diogenese could take a peek for us to see whether this is anything to get excited about?

Could AKIDA be the "SWD interface" which I've circled below?

Here's a link to the data sheet which was uploaded on 1 April 2024.

https://www.renesas.com/us/en/document/dst/da14535-datasheet?r=25467666

View attachment 63142

DA14535 - SmartBond TINY DA14535 Bluetooth Low Energy 5.3 SoC

The DA14535 is an ultra-low power SoC integrating a 2.4 GHz transceiver and an Arm® Cortex-M0+ microcontroller with 64kB RAM and 12kB OTP memory.

www.renesas.com

View attachment 63145

That's not really an auspicious date to publish anything. Also you should get a refund for the $49.95 option. Mine has the complementary aluminium foil insert.

SwD = Software Defined?

Cortex MO+ is all thumbs.

6 Arm Cortex-M0+ 6.1 Introduction

The Arm Cortex-M0+ processor is a 32-bit Reduced Instruction Set Computing (RISC) processor with a von Neumann architecture (single bus interface).
It uses an instruction set called Thumb, which was first supported in the ARM7TDMI processor, but it also uses several newer instructions from the Armv6 architecture and a few instructions from the Thumb-2 technology.
Thumb-2 technology extends the previous Thumb instruction set to allow all operations to be carried out in one CPU state. The instruction set in Thumb-2 includes both 16-bit and 32-bit instructions; most instructions generated by the C compiler use the 16-bit instructions, and the 32-bit instructions are used when the 16-bit version cannot carry out the required operations. This results in high code density and avoids the overhead of switching between two instruction sets. In total, the Cortex-M0+ processor supports only 56 base instructions, although some instructions can have more than one form. Although the instruction set is small, the Cortex-M0+ processor is highly capable because the Thumb instruction set is highly optimized. Academically, the Cortex-M0+ processor is classified as load-store architecture, as it has separate instructions for reading and writing to memory, and instructions for arithmetic or logical operations that use registers. It has a two-stage pipeline (fetch+predecode and decode+execute) as opposed to its predecessor (Cortex-M0) that has a three-stage pipeline (fetch, decode, and execute). Figure 20 shows a simplified block diagram of the Cortex-M0+.

 

[Bravo]

Hi Ill,

Nodar runs on Nvidia Jetson orin:

https://www.agritechtomorrow.com/ne...al-automation-powered-by-nvidia-jetson/15184/

NODAR Announces Advanced Stereo Vision Technology for Next-Generation Agricultural Automation, Powered by NVIDIA Jetson​

Visit http://www.nodarsensor.com for further information
NODAR's AgriView Revolutionizes the Agriculture Market with State-of-the-Art 3D Vision for Autonomous Farming, Powered by NVIDIA Jetson Orin System-on-Modules
01/09/24, 06:00 AM | Precision Farming
In a significant development for agricultural technology, NODAR announces its next-generation solutions for the farming industry, powered by the NVIDIA Jetson platform for edge AI and robotics.


That's not really an auspicious date to publish anything. Also you should get a refund for the $49.95 option. Mine has the complementary aluminium foil insert.

SwD = Software Defined?

Cortex MO+ is all thumbs.


View attachment 63146

6 Arm Cortex-M0+ 6.1 Introduction

The Arm Cortex-M0+ processor is a 32-bit Reduced Instruction Set Computing (RISC) processor with a von Neumann architecture (single bus interface).
It uses an instruction set called Thumb, which was first supported in the ARM7TDMI processor, but it also uses several newer instructions from the Armv6 architecture and a few instructions from the Thumb-2 technology.
Thumb-2 technology extends the previous Thumb instruction set to allow all operations to be carried out in one CPU state. The instruction set in Thumb-2 includes both 16-bit and 32-bit instructions; most instructions generated by the C compiler use the 16-bit instructions, and the 32-bit instructions are used when the 16-bit version cannot carry out the required operations. This results in high code density and avoids the overhead of switching between two instruction sets. In total, the Cortex-M0+ processor supports only 56 base instructions, although some instructions can have more than one form. Although the instruction set is small, the Cortex-M0+ processor is highly capable because the Thumb instruction set is highly optimized. Academically, the Cortex-M0+ processor is classified as load-store architecture, as it has separate instructions for reading and writing to memory, and instructions for arithmetic or logical operations that use registers. It has a two-stage pipeline (fetch+predecode and decode+execute) as opposed to its predecessor (Cortex-M0) that has a three-stage pipeline (fetch, decode, and execute). Figure 20 shows a simplified block diagram of the Cortex-M0+.


View attachment 63147

PS: Unfortunately I can't ask for a refund because the "not going to hell" was an optional extra that I wasn't prepared to pay for.

 

[Pom down under]

Toyota, Nissan and Honda to team on AI and chips for next-gen cars

Japanese automakers to collaborate in 7 areas under government strategy

asia.nikkei.com

 

[Learning]

Just voted!

All 8: For
Last one: 110% Against.

Just my 2 cent.

Have a great weekend everyone

Learning

 

[Smoothsailing]

View attachment 63149


PS: Unfortunately I can't ask for a refund because the "not going to hell" was an optional extra that I wasn't prepared to pay for.

Omsemi and brainchip still working in the background tho,

 

[Bravo]

Aiieeeyyyee!

On this Youtube interview from 3 days ago, Sam Altman is asked a question about the prospect of developing an on-device model for latency. His response is very interesting and it seems IMO like he believes there will be a necessity for it, especially for generated video content with AR goggles in real-time.


(3.50 mins)

Interviewer :"Do you think you need to develop an on-device model to decrease latency to the point for usability."

Sam Atman: "Umm for video, maybe it would be hard to deal with network latency at some point, like, the thing that I've thought would be super amasing would be to put on someday a pair of AR goggles or whatever and just speak the world in real-time and watch things change and that might get harder over network latency. But for this (meaning ChatGPT 4), 200 or 300 milliseconds of latency feels super, like, it feels faster than a a human responding to me in many cases".

Interviewer "Is video in this case images?

Sam Atman: "Oh, sorry I meant video if you wanted generated video, not input video".

Interviewer " Got it. So currently it's working with actual video the way it is.

Sam Altman: "Well, frame by frame".