Hi Cosors,
Here's my explanation:
B
inary stochastic neurons (BSN’s) form an integral part of many machine learning algorithms, motivating the development of hardware accelerators for this complex function. It has been recognized that hardware BSN’s can be implemented using low barrier magnets (LBM’s) by minimally modifying presentday magnetoresistive random access memory (MRAM) devices. A crucial parameter that determines the response of these LBM based BSN designs is the correlation time of magnetization, τc. In this letter, we show that for magnets with low energy barriers (∆ ≈ kBT and below), circular disk magnets with in-plane magnetic anisotropy (IMA) lead to τc values that are two orders of magnitude smaller compared to τc for magnets having perpendicular magnetic anisotropy (PMA) and provide analytical descriptions. We show that this striking difference in τc is due to a precession-like fluctuation mechanism that is enabled by the large demagnetization field in IMA magnets. We provide a detailed energy-delay performance evaluation of previously proposed BSN designs based on Spin-Transfer-Torque (STT) MRAM and Spin-Orbit-Torque (SOT) MRAM employing low barrier circular IMA magnets by SPICE simulations. The designs exhibit sub-ns response times leading to energy requirements of ∼a few fJ to evaluate the BSN function, orders of magnitude lower than digital CMOS implementations with a much larger footprint. While modern MRAM technology is based on PMA magnets, results in this paper suggest that low barrier circular IMA magnets may be more suitable for this application.
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I
n PMA, the thermal noise makes the magnetization fluctuate randomly anywhere on the Bloch sphere, while in IMA the large demagnetization field restricts the fluctuations to an in-plane precession-like fluctuations making it much faster.
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I
n low barrier IMA magnets when thermal noise kicks the magnetization out-of-plane, due to the presence of large orthogonal demagnetization field HD the in-plane magnetization starts precessing. If we consider an ensemble of such magnets each with a different precession frequency due to thermal noise, the average magnetization vector would quickly dissipate.
Well actually I pinched it from:
https://arxiv.org/pdf/1902.03650v1.pdf
I'm guessing that it is to do with the alignment of the magnetic dipoles, but this technology is outside my experience.
However, it is interesting that the wheel has turned full circle s far as magnet memories are concerned. Before silicon, early computer memory bits were stored in ferrite rings with two control wires and a sensing wire.
PS: I would like to join the ViNO group.
PPS: Is taking your feet in your hands the German equivalent of bootstrapping?
Thanks for the explanation that put me on the right track. No wonder UVA/ViNO is interested in Akida.
"
IEDM: Magnetic RAM debuts as 28nm embedded NVM
November 18, 2016
A number of magnetic RAM developments are set to be reported at the International Electron Devices Meeting coming up in San Francisco from December 3 - 7, 2016 by teams from Samsung, Toshiba, SK Hynix and others.
A team drawn from Samsung R&D and Samsung's LSI business unit are apparently going to present the same information twice once in the main program and once in poster session dedicated to MEMS development.
The topic of both the oral presentation and the poster presentation is an 8Mbit spin-torque transfer
MRAM embedded in a 28nm CMOS logic manufacturing process. The title of the main presentation – paper 27.2 – describes the circuit as "highly functional and reliable." The abstract adds that a novel integration, material stack and patterning technologies have been used to embed the perpendicular magnetic tunnel junction memory cell array into the copper metal back end without open fails and without severe degradation of the magnetic properties.
The perpendicular MTJ (pMTJ) uses a MgO/CoFeB stack to achieve a
tunnel magnetoresistance value of 180 percent after full integration. Ion beam etching was used to reduce short fails below 1ppm. It will be interesting to see what the implications of IBE are for production throughput. The embed MRAM macro has a side sensing margin and retains information at 85 degrees C for 10 years, the abstract states.
...
https://web.archive.org/web/20170303130002/http://www.analog-eetimes.com/news/iedm-magnetic-ram-debuts-28nm-embedded-nvm
PS: If it's about you personally then I can imagine that very well. When it comes to ViNO they just jumped into bed with Brainchip via UVA I think.
PSS: For us, putting our feet/leg up means something other than bootstrapping. It is more simply mean and just means to take something in hand, to tackle it, to hurry up. In French I think it means to put your legs around your neck.
bootstrapping?
Münchhausen pulls himself and his horse out of the swamp by the pigtail
