Teksun Inc on LinkedIn: Artificial Intelligence And Machine Learning
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The Pope
Regular
Unfortunately this rumour may have come from dickleboro (MF) update he posted today.
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Straw
Guest
I thought there was some sort of consensus here not to post MF material (...sry excrement). It is another hit job just in time for end of year. Lovely of him to present some self-'verified' conjecture. FFS
JoMo68
Regular
What a douchebag…
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Nvidia don't get digital SNNs.
Accelerator(s) 1314 in this specification would be a candidate for replacement by Akida:
US2020364508A1 USING DECAY PARAMETERS FOR INFERENCING WITH NEURAL NETWORKS
[0146] In at least one embodiment, GPU(s) 1308 may include an integrated GPU (alternatively referred to herein as an “iGPU”). In at least one embodiment, GPU(s) 1308 may be programmable and may be efficient for parallel workloads. In at least one embodiment, GPU(s) 1308 , in at least one embodiment, may use an enhanced tensor instruction set. In on embodiment, GPU(s) 1308 may include one or more streaming microprocessors, where each streaming microprocessor may include a level one (“L1”) cache (e.g., an L1 cache with at least 96 KB storage capacity), and two or more of streaming microprocessors may share an L2 cache (e.g., an L2 cache with a 512 KB storage capacity). In at least one embodiment, GPU(s) 1308 may include at least eight streaming microprocessors. In at least one embodiment, GPU(s) 1308 may use compute application programming interface(s) (API(s)). In at least one embodiment, GPU(s) 1308 may use one or more parallel computing platforms and/or programming models (e.g., NVIDIA's CUDA).
[0147] In at least one embodiment, one or more of GPU(s) 1308 may be power-optimized for best performance in automotive and embedded use cases. For example, in on embodiment, GPU(s) 1308 could be fabricated on a Fin field-effect transistor (“FinFET”). In at least one embodiment, each streaming microprocessor may incorporate a number of mixed-precision processing cores partitioned into multiple blocks. For example, and without limitation, 64 PF32 cores and 32 PF64 cores could be partitioned into four processing blocks. In at least one embodiment, each processing block could be allocated 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed-precision NVIDIA TENSOR COREs for deep learning matrix arithmetic, a level zero (“L0”) instruction cache, a warp scheduler, a dispatch unit, and/or a 64 KB register file. In at least one embodiment, streaming microprocessors may include independent parallel integer and floating-point data paths to provide for efficient execution of workloads with a mix of computation and addressing calculations. In at least one embodiment, streaming microprocessors may include independent thread scheduling capability to enable finer-grain synchronization and cooperation between parallel threads. In at least one embodiment, streaming microprocessors may include a combined L1 data cache and shared memory unit in order to improve performance while simplifying programming.
…
0152] In at least one embodiment, one or more of SoC(s) 1304 may include one or more accelerator(s) 1314 (e.g., hardware accelerators, software accelerators, or a combination thereof). In at least one embodiment, SoC(s) 1304 may include a hardware acceleration cluster that may include optimized hardware accelerators and/or large on-chip memory. In at least one embodiment, large on-chip memory (e.g., 4 MB of SRAM), may enable hardware acceleration cluster to accelerate neural networks and other calculations. In at least one embodiment, hardware acceleration cluster may be used to complement GPU(s) 1308 and to off-load some of tasks of GPU(s) 1308 (e.g., to free up more cycles of GPU(s) 1308 for performing other tasks). In at least one embodiment, accelerator(s) 1314 could be used for targeted workloads (e.g., perception, convolutional neural networks (“CNNs”), recurrent neural networks (“RNNs”), etc.) that are stable enough to be amenable to acceleration. In at least one embodiment, a CNN may include a region-based or regional convolutional neural networks (“RCNNs”) and Fast RCNNs (e.g., as used for object detection) or other type of CNN.
[0154] In at least one embodiment, DLA(s) may perform any function of GPU(s) 1308 , and by using an inference accelerator, for example, a designer may target either DLA(s) or GPU(s) 1308 for any function. For example, in at least one embodiment, designer may focus processing of CNNs and floating point operations on DLA(s) and leave other functions to GPU(s) 1308 and/or other accelerator(s) 1314 .
[0155] In at least one embodiment, accelerator(s) 1314 (e.g., hardware acceleration cluster) may include a programmable vision accelerator(s) (“PVA”), which may alternatively be referred to herein as a computer vision accelerator. In at least one embodiment, PVA(s) may be designed and configured to accelerate computer vision algorithms for advanced driver assistance system (“ADAS”) 1338 , autonomous driving, augmented reality (“AR”) applications, and/or virtual reality (“VR”) applications. PVA(s) may provide a balance between performance and flexibility. For example, in at least one embodiment, each PVA(s) may include, for example and without limitation, any number of reduced instruction set computer (“RISC”) cores, direct memory access (“DMA”), and/or any number of vector processors.
Accelerator(s) 1314 in this specification would be a candidate for replacement by Akida:
US2020364508A1 USING DECAY PARAMETERS FOR INFERENCING WITH NEURAL NETWORKS
[0146] In at least one embodiment, GPU(s) 1308 may include an integrated GPU (alternatively referred to herein as an “iGPU”). In at least one embodiment, GPU(s) 1308 may be programmable and may be efficient for parallel workloads. In at least one embodiment, GPU(s) 1308 , in at least one embodiment, may use an enhanced tensor instruction set. In on embodiment, GPU(s) 1308 may include one or more streaming microprocessors, where each streaming microprocessor may include a level one (“L1”) cache (e.g., an L1 cache with at least 96 KB storage capacity), and two or more of streaming microprocessors may share an L2 cache (e.g., an L2 cache with a 512 KB storage capacity). In at least one embodiment, GPU(s) 1308 may include at least eight streaming microprocessors. In at least one embodiment, GPU(s) 1308 may use compute application programming interface(s) (API(s)). In at least one embodiment, GPU(s) 1308 may use one or more parallel computing platforms and/or programming models (e.g., NVIDIA's CUDA).
[0147] In at least one embodiment, one or more of GPU(s) 1308 may be power-optimized for best performance in automotive and embedded use cases. For example, in on embodiment, GPU(s) 1308 could be fabricated on a Fin field-effect transistor (“FinFET”). In at least one embodiment, each streaming microprocessor may incorporate a number of mixed-precision processing cores partitioned into multiple blocks. For example, and without limitation, 64 PF32 cores and 32 PF64 cores could be partitioned into four processing blocks. In at least one embodiment, each processing block could be allocated 16 FP32 cores, 8 FP64 cores, 16 INT32 cores, two mixed-precision NVIDIA TENSOR COREs for deep learning matrix arithmetic, a level zero (“L0”) instruction cache, a warp scheduler, a dispatch unit, and/or a 64 KB register file. In at least one embodiment, streaming microprocessors may include independent parallel integer and floating-point data paths to provide for efficient execution of workloads with a mix of computation and addressing calculations. In at least one embodiment, streaming microprocessors may include independent thread scheduling capability to enable finer-grain synchronization and cooperation between parallel threads. In at least one embodiment, streaming microprocessors may include a combined L1 data cache and shared memory unit in order to improve performance while simplifying programming.
…
0152] In at least one embodiment, one or more of SoC(s) 1304 may include one or more accelerator(s) 1314 (e.g., hardware accelerators, software accelerators, or a combination thereof). In at least one embodiment, SoC(s) 1304 may include a hardware acceleration cluster that may include optimized hardware accelerators and/or large on-chip memory. In at least one embodiment, large on-chip memory (e.g., 4 MB of SRAM), may enable hardware acceleration cluster to accelerate neural networks and other calculations. In at least one embodiment, hardware acceleration cluster may be used to complement GPU(s) 1308 and to off-load some of tasks of GPU(s) 1308 (e.g., to free up more cycles of GPU(s) 1308 for performing other tasks). In at least one embodiment, accelerator(s) 1314 could be used for targeted workloads (e.g., perception, convolutional neural networks (“CNNs”), recurrent neural networks (“RNNs”), etc.) that are stable enough to be amenable to acceleration. In at least one embodiment, a CNN may include a region-based or regional convolutional neural networks (“RCNNs”) and Fast RCNNs (e.g., as used for object detection) or other type of CNN.
[0154] In at least one embodiment, DLA(s) may perform any function of GPU(s) 1308 , and by using an inference accelerator, for example, a designer may target either DLA(s) or GPU(s) 1308 for any function. For example, in at least one embodiment, designer may focus processing of CNNs and floating point operations on DLA(s) and leave other functions to GPU(s) 1308 and/or other accelerator(s) 1314 .
[0155] In at least one embodiment, accelerator(s) 1314 (e.g., hardware acceleration cluster) may include a programmable vision accelerator(s) (“PVA”), which may alternatively be referred to herein as a computer vision accelerator. In at least one embodiment, PVA(s) may be designed and configured to accelerate computer vision algorithms for advanced driver assistance system (“ADAS”) 1338 , autonomous driving, augmented reality (“AR”) applications, and/or virtual reality (“VR”) applications. PVA(s) may provide a balance between performance and flexibility. For example, in at least one embodiment, each PVA(s) may include, for example and without limitation, any number of reduced instruction set computer (“RISC”) cores, direct memory access (“DMA”), and/or any number of vector processors.
cosors
👀
Can someone explain to me what this Brainchip employee is doing or what it is all about?
"Work with deep reinforcement learning and physics engines to create self-balancing rods."
https://www.linkedin.com/in/narendhiran13
"Work with deep reinforcement learning and physics engines to create self-balancing rods."
https://www.linkedin.com/in/narendhiran13
cosors
👀
For Mickle: Doesn't Kaellenius demonstrates here Akida involved 'Hey Mercedes' hands free to the Nvidias CEO?
I had asked if that might have been humiliating. For Mickle with his personal vendetta for sure. Has probably hung around too much on HC that did his head not good I can imagine.
So much time invested and then they all take off to a private forum. No wonder he is depressed and takes it personally.
I ignore not only TMH but also the fools and basically no matter what stocks. Private agenda on a financial advisory platform I find unprofessional.
Frangipani
Regular
He evidently cannot tell a visionary product pipeline from a pipe dream.
Well, I can’t wait till the time is ripe to submit screenshots of his posts to the editors of below compilations, where they will rank with other legendary failed predictions about the future, and to see Mr. Micro Bloke (now isn’t that a fitting anagram of his name?!) being forced to eat humble pie.
30 Posts From The Past That Did Not Age Well
Wine, cheese and Anderson Cooper - are all things that have proven some things get better with age - however with the immortalization of our words on the internet have shown, there are some things that do not.
www.boredpanda.com
38 Things From The Past That Did Not Age Well
The future turned out a whole lot differently than people expected.
www.boredpanda.com
thelittleshort
Top Bloke
New role advertised at Mercedes Benz - Development Engineer Hard/Software AI - ADAS
Steven Peters (one of the 'likes') is the former lead of AI for Mercedes Benz, who lead the EQXX project. He worked with Akida on this project
www.linkedin.com
The Mercedes-Benz Group AG is one of the most successful automotive companies in the world. With Mercedes-Benz AG, the vehicle manufacturer is one of the largest providers of premium and luxury cars and vans.
In the "Innovations & Future Technologies" area, our "Future Software & AI" department develops innovative, forward-looking concepts and products for the future of Mercedes-Benz. The portfolio covers key features of our vehicles and the associated ecosystem with the user experience, software architecture, metaverse, WEB 3.0 and AI. The close cooperation across the team boundaries enables us in an ideal way to realize synergies in the development of an intelligent and inspiring user experience in the vehicle, ecosystem and metaverse. Modern software and AI technologies fit seamlessly here
We are the highly motivated and interdisciplinary team Future UX-Concepts & UX-SW Technologies. We work on a variety of future topics and are drivers/initiators of new user experiences and SW technology innovations. With us you will become a pioneer of augmented reality (AR) displays for in-car applications. Your task includes dealing with the topics of augmented reality, innovative display and interaction concepts and human computer interaction. An essential aspect of this work is the conception and implementation of future-oriented 3D user experiences in the vehicle and their systematic evaluation through customer studies.
Your tasks / These challenges are coming your way:
Steven Peters (one of the 'likes') is the former lead of AI for Mercedes Benz, who lead the EQXX project. He worked with Akida on this project
Sign Up | LinkedIn
500 million+ members | Manage your professional identity. Build and engage with your professional network. Access knowledge, insights and opportunities.
The Mercedes-Benz Group AG is one of the most successful automotive companies in the world. With Mercedes-Benz AG, the vehicle manufacturer is one of the largest providers of premium and luxury cars and vans.
In the "Innovations & Future Technologies" area, our "Future Software & AI" department develops innovative, forward-looking concepts and products for the future of Mercedes-Benz. The portfolio covers key features of our vehicles and the associated ecosystem with the user experience, software architecture, metaverse, WEB 3.0 and AI. The close cooperation across the team boundaries enables us in an ideal way to realize synergies in the development of an intelligent and inspiring user experience in the vehicle, ecosystem and metaverse. Modern software and AI technologies fit seamlessly here
We are the highly motivated and interdisciplinary team Future UX-Concepts & UX-SW Technologies. We work on a variety of future topics and are drivers/initiators of new user experiences and SW technology innovations. With us you will become a pioneer of augmented reality (AR) displays for in-car applications. Your task includes dealing with the topics of augmented reality, innovative display and interaction concepts and human computer interaction. An essential aspect of this work is the conception and implementation of future-oriented 3D user experiences in the vehicle and their systematic evaluation through customer studies.
Your tasks / These challenges are coming your way:
- Software and AI development for neuromorphic hardware
- AI development of a middleware software (compatible with Spiking Neural Networks)
- Research and transfer of the latest neuromorphic hardware trends for ADAS
- Strategic development in the field of neuromorphic hardware for ADAS
- Series development of new eDrive system diagnostics and coordination of specific system interfaces
- Creation of schedules for conversions and superstructures, implementation of minor conversions/adjustments, project management for the timely provision of prototypes for the implementation of studies
Last edited:
GStocks123
Regular
Socionext with some demos at SC
www.linkedin.com
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TheFunkMachine
seeds have the potential to become trees.
wilzy123
Founding Member
supersonic001
Regular
BrainChip on LinkedIn: Newsletter
The BrainChip June 2023 newsletter is out- Strengthening the Industry Together – Global Leadership Summit and much more. Register here for the BrainChip…
GDJR69
Regular
Correct me if I'm wrong but Mercedes keep referring to 'neuromorphic' AI and as far as I am aware NVIDIA does not have neuromorphic AI, only Brainchip has neuromorphic AI. Happy to be corrected.New role advertised at Mercedes Benz - Development Engineer Hard/Software AI - ADAS
View attachment 38696
Steven Peters (one of the 'likes') is the former lead of AI for Mercedes Benz, who lead the EQXX project. He worked with Akida on this project
View attachment 38698
View attachment 38695Sign Up | LinkedIn
500 million+ members | Manage your professional identity. Build and engage with your professional network. Access knowledge, insights and opportunities.
The Mercedes-Benz Group AG is one of the most successful automotive companies in the world. With Mercedes-Benz AG, the vehicle manufacturer is one of the largest providers of premium and luxury cars and vans.
In the "Innovations & Future Technologies" area, our "Future Software & AI" department develops innovative, forward-looking concepts and products for the future of Mercedes-Benz. The portfolio covers key features of our vehicles and the associated ecosystem with the user experience, software architecture, metaverse, WEB 3.0 and AI. The close cooperation across the team boundaries enables us in an ideal way to realize synergies in the development of an intelligent and inspiring user experience in the vehicle, ecosystem and metaverse. Modern software and AI technologies fit seamlessly here
We are the highly motivated and interdisciplinary team Future UX-Concepts & UX-SW Technologies. We work on a variety of future topics and are drivers/initiators of new user experiences and SW technology innovations. With us you will become a pioneer of augmented reality (AR) displays for in-car applications. Your task includes dealing with the topics of augmented reality, innovative display and interaction concepts and human computer interaction. An essential aspect of this work is the conception and implementation of future-oriented 3D user experiences in the vehicle and their systematic evaluation through customer studies.
Your tasks / These challenges are coming your way:
- Software and AI development for neuromorphic hardware
- AI development of a middleware software (compatible with Spiking Neural Networks)
- Research and transfer of the latest neuromorphic hardware trends for ADAS
- Strategic development in the field of neuromorphic hardware for ADAS
- Series development of new eDrive system diagnostics and coordination of specific system interfaces
- Creation of schedules for conversions and superstructures, implementation of minor conversions/adjustments, project management for the timely provision of prototypes for the implementation of studies
DollazAndSense
Regular
Glad to see the NVISO website is live again. Looks like it received an overhaul? I was a little concerned with the negative talks about their IPO recently. I always felt like they were going to be a great partner for us so hopefully the issues have been ironed out.
Hopefully we will also get monthly news letter from them
HopalongPetrovski
I'm Spartacus!
Maybe the new guy keeps forgetting to reset the screen when they get back from their research trip to next week in their way back machine?
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