BRN Discussion Ongoing

buena suerte :-)

BOB Bank of Brainchip
Duck Reaction GIF
Dog Reaction GIF
Deep breath and relax! phew :cool:☺️
 
  • Like
  • Haha
  • Love
Reactions: 23 users

JB49

Regular
I presume this license revenue is from Renases and Megachips given that no other licensing agreements have been officially announced on the ASX.
 
  • Like
  • Thinking
  • Fire
Reactions: 21 users

Townyj

Ermahgerd
  • Like
  • Fire
  • Haha
Reactions: 33 users

Diogenese

Top 20
NO NEVER .. not our number one sleuthing agent ... :love::love: Give us a wave or a purr :ROFLMAO::ROFLMAO:🐱 @Bravo
I heard she had hetrbig toe stuck in the plug hole of the hot tub.
Well Luminar was a bit left field.

I have had Luminar on my competitors list because we did not have any dots, but @Stable Genius caused me to revisit their patents.

Luminar have a large number of LiDaR related patents, just shy of 100.

This one caught my eye and initiated a little synaptic frisson.

US2018284234A1 Foveated Imaging in a Lidar System



View attachment 30429


To identify the most important areas in front of a vehicle for avoiding collisions, a lidar system obtains a foveated imaging model. The foveated imaging model is generated by detecting the direction at which drivers' are facing at various points in time for several scenarios based on road conditions or upcoming maneuvers. The lidar system identifies an upcoming maneuver for the vehicle or a road condition and applies the identified maneuver or road condition to the foveated imaging model to identify a region of a field of regard at which to increase the resolution. The lidar system then increases the resolution at the identified region by increasing the pulse rate for transmitting light pulses within the identified region, filtering pixels outside of the identified region, or in any other suitable manner.

"Goodness me!*" I hear you exclaim "What is foveated imaging?"

Foveated imaging - Wikipedia


Foveated imaging is a digital image processing technique in which the image resolution, or amount of detail, varies across the image according to one or more "fixation points". A fixation point indicates the highest resolution region of the image and corresponds to the center of the eye's retina, the fovea.

In LiDaR, foveated means concentrating more light spots on a region of interest.

So why is this interesting?

In the fireside chat, PvdM mentioned that the eye has a central region which is more high definition and attuned to movement than the peripheral region which is lower definition but more sensitive to light variation (the very same fovea that Luminar's patent seeks to imitate)

So does this mean Luminar and BrainChip are an item? Well, no, but ...

* Archaic version of "WTF".

Product recall: - It has been pointed out to me by a poster that the reference to PvdM discussing high definition and lower definition peripheral regions does not exist in the fireside chat. I cannot recall the origin of the information, so the paragraph verballing Peter should be ignored, as my memory is unreliable.

All the best
DodgyNews
Product recall: - It has been pointed out to me by a poster that the reference to PvdM discussing high definition and lower definition peripheral regions does not exist in the fireside chat. I cannot recall the origin of the information, so the paragraph verballing Peter should be ignored, as my memory is unreliable.

All the best
DodgyNews
 
  • Haha
  • Like
  • Love
Reactions: 17 users

buena suerte :-)

BOB Bank of Brainchip
So just imagine... a 219% Increase YoY from now on... Fingers crossed it blows that out of the water tbh.

11.1 Million - 2023
24.3 Million - 2024
53.2 Million - 2025

Only rough estimations... but.. It could go gangbusters.

Happy Season 9 GIF by The Office
Channing Tatum Dance GIF by TV4
Austin Powers Dancing GIF
Yeah baby :love:
 
  • Haha
  • Like
  • Fire
Reactions: 17 users

Damo4

Regular
"Our Board of Directors grew in 2022 with the addition on Duy-Loan Le. Her early contributions have already made a material impact."

Would love to know more about the specifics of this statement!
 
  • Like
  • Fire
  • Thinking
Reactions: 30 users

ndefries

Regular
This i found interesting .....as a result of the company delivering on all performance obligations related to a significant license agreement

this made me jump to the Valeo development agreement signed with BRN

.....The terms of the deal stipulate that both companies must reach specific performance milestones, with BrainChip stating it expects to receive payments to cover its expenses, subject to the completion of, as yet, undisclosed milestones.

I hope this is it.
 
  • Like
  • Fire
  • Love
Reactions: 70 users

toasty

Regular
Watch out for an avalanche of negativity as shorts taken out over the last week or so make a desperate attempt to avoid getting BURNED......
 
  • Like
  • Haha
  • Thinking
Reactions: 19 users

Damo4

Regular
Watch out for an avalanche of negativity as shorts taken out over the last week or so make a desperate attempt to avoid getting BURNED......

I think they are taking this "digestive" time to close positions and then we will be released.
 
  • Like
Reactions: 6 users

Wickedwolf

Regular
Just got to be happy with that update, delivering on the roadmap exactly as outlined. Really impressed and looking forward to the next 12 months.
 
  • Like
  • Love
  • Fire
Reactions: 31 users

wilzy123

Founding Member
"In Q4 2022, BrainChip added two North American and one Korean sales executive, and launched formal searches for sales talent in Germany and Japan with the view to aggressively pursue engagements globally."

Annual Report (p.6)
 
  • Like
  • Fire
  • Love
Reactions: 52 users
  • Like
  • Love
  • Haha
Reactions: 16 users

Bravo

If ARM was an arm, BRN would be its biceps💪!
NO NEVER .. not our number one sleuthing agent ... :love::love: Give us a wave or a purr :ROFLMAO::ROFLMAO:🐱 @Bravo
Meow! Meow @BienSuerte! Yes, I’m still here but I’ve been literally snowed under (primarily in oodles of clutter)! I stupidly offered to help my folks downsize and it’s literally Hoarders Corner out here, where you could be guaranteed to find any type of trinket, utensil, ancient piece of equipment or general knick-knackery that is completely impractical or not in working order and that serves no purpose that I can ascertain. It’s on a farm in the middle of no-where, so the highlight of the past week or so was having a chat to the bloke who picked up the skip bin yesterday since he‘s been the only other person I‘ve encountered for a week or so, aside from said folks. When he left, he asked me if there was anything else that I wanted to throw away and I replied “yes, my step-father”. He couldn’t assist with that request however because they have certain items that you not supposed to put inside skip bins like paint, oil and human beings apparently. So, all in all, it hasn’t been PURRRFECT 😝, but I‘m getting there and I should be back snooping and sleuthing around in no time.

😘

B
 
  • Like
  • Love
  • Haha
Reactions: 82 users

jk6199

Regular
Come on BRN.

One more juicy announcement and I bet we'll keep on seeing some huge sell orders going through!
 
  • Like
  • Haha
  • Fire
Reactions: 14 users

Diogenese

Top 20
Hasn't the Akida 1500 been (more quickly) developed at the insistance of a client? Who knows which one.
Hi Dhm,

Akida 1500 has 8 nodes compared with Akida1000's 20 nodes. 8 nodes is 32 NPUs so a reasonable NN can be configured.

It also does not include the ARM Cortex processor.

Some other peripherals, (possibly comms interfaces?) have been left off.

It also includes CNN2SNN input and probably an SNN2CNN output so it can slot into existing CNN applications.

While we do not know what, if any, new features are added, this means it is a much smaller chip than Akida 1000, which in turn means more chips per wafer, so a much cheaper chip without the impost of an ARM licence/royalty fee.

It does meet the requirements of a recent NASA SBIR for 22nm FD-SOI without a processor.

The compact size would enhance the 1500's compatibility with near-sensor applications.

I don't know what the maximum throughput (fps or equivalent) of the 1500 would be, but given that Prophesee was not entirely satisfied with the Synsense (analog?) SNN's ability to match Prophesee's speed, would a reduced Akida still meet Prophesee's performance?

Whatever the application is, there will need to be an associated processor to configure the 1500. With the PCIe demonstrator board, that may be, eg, a Raspberry Pi processor. For the 1500 IP, Akida is processor agnostic.

Providing th SNN2CNN output is interesting in that it indicates one potential use id with legacy CNN software. Thousands of hours can be invested in developing software, so customers may be reluctant to discard that investment.

Any CNN software will have an associated 8-bit or more model library (eg, millions of hand-classified images) which also represents a very substantial investment of time and expertise.

FD-SoI is low leakage due to the (I)nsulator, and thus low power. It is also radiation hard, so it can withstand hostile environments.

Such extremely low power means that it may be able to be installed in applications where cooling is difficult to provide, and acting as an accelerator, 1500 will also relieve the main processor of much of the heavy lifting, again reducing the cooling requirement for the main processor.

So we are looking for a customer who has a need for near-sensor classification/inference (and ML?), has a significant investment in (legacy) CNN-dependent software, and a need to conserve power. Such legacy software would have the virtue of being extensively field tested and de-bugged, so the owner would be reluctant to build new software from the ground up.

Automotive, for one, comes to mind. There is massive investment in ADAS/AV software, all of which would have been designed for CNN.

DVS does have sparse sensor data, but Prophesee generates data at enormous speed. BrainChip are fully aware of Phophesee's capabilities, and, no doubt, the opportunity for near sensor inference/classification/ML.

While 1500 seems to meet the NASA SBIR, it is not a high volume consumer, so may not be the primary target, unless USAF and DoD generally are involved on the quiet.

Who knows?
 
  • Like
  • Fire
  • Love
Reactions: 84 users

Dozzaman1977

Regular
2022 Annual Report great result
One thing i noticed was on page 7. Below Highlighted

SIGNIFICANT EVENTS AFTER THE BALANCE DATE
Subsequent to the end of the year, the following events occurred:
The Company issued 10,000,000 ordinary shares to the Trustee of the 2018 Long Term Incentive Plan and
196,001 shares to third parties for consulting services.
Since 1 January 2023 and to the date of this report, LTIP participants have exercised 3,260,417 options
contributing A$765,542 cash inflows to the Company.
249,146 PRs and 94,507 RSUs have converted to
shares upon vesting and a further 600,000 RSUs have been granted to new LTIP participants.
On 10 January 2023, BrainChip submitted a capital call notice to LDA Capital in accordance with the POA to
subscribe for up to 30 million shares with an option for LDA Capital to subscribe for up to an additional 10
million shares subject to Company approval. The purpose of this capital call notice was to support the Akida
technology development and working capital commitments, as well as satisfy the Company’s obligation under
The Second Minimum Drawdown Amount requiring a minimum of A$15 million to be drawn no later than 31
December 2023.


So In less than 2 months employees through the long term incentive plan have contributed (bought) nearly $800,000 of stock

I think this illustrates that the employees inside Brainchip are very happy with where the company is heading.

Larry David Hbo GIF by Curb Your Enthusiasm


Episode 2 Wow GIF by Curb Your Enthusiasm
Season 9 Fist Bump GIF by Curb Your Enthusiasm
 
  • Like
  • Fire
  • Love
Reactions: 94 users

Xhosa12345

Regular
Revenue 5m for the year usd,

About 4.8M this was in the 6 months to june.

So revenue for the remaining 6 months $200K odd in product revenue to end December - hence the last couple of soft 4C's

no change to license revenue which presumable makes sense cos likely wouldve needed announcements

Debtors 2.5 M at june, 1.5M at December , so 1M movement downwards equating to the 4C's
received 100K in Sept and 1.1 in Dec 4C = 1.2M -the difference being the $200K in accounting revenue for the 6 months

so that confirms revenue for the 6 months at 200K

sorry just my quick accounting checks - i could be wrong, usually am 90% of time according to the mrs

still a lot of work to do please brainchip....!!

giphy (1).gif
 
  • Like
  • Fire
  • Thinking
Reactions: 27 users
  • Like
  • Fire
Reactions: 15 users

Tothemoon24

Top 20
Chip-level tweaks give automotive SoC performance boost

Chip-level tweaks give automotive SoC performance boost​

Technology News | February 22, 2023
By Christoph Hammerschmidt
AUTOMOTIVE MPUS/MCUS

Domain and zone architectures in the car are becoming reality – and require adequate high-performance infrastructure in the car. Renesas now has pimped its existing gateway SoC range. At the current International Solid-State Circuits Conference (ISSCC) in San Francisco, the company announced its latest tweaks at the semiconductor level.


SoCs for automotive gateways provide both high performance data path and routing capabilities to implement new applications such as cloud services. When not in use, they must reduce their power consumption to a minimum, especially when they are installed in BEVs. They also need to deliver fast CAN response to support instant start-up. Additionally, these SoCs need to provide power-efficient communication technology that enables network functions as a gateway using limited power and security technology to enable safe communication outside the vehicle. To meet these requirements, Renesas has developed

  • an architecture that dynamically changes the circuit timing to match vehicle conditions with optimised performance and power consumption,
  • fast start-up technology by partitioning and powering essential programs only,
  • a network accelerator that achieves a power efficiency of 10 gigabits per second/watt (Gbps/W), and
  • security technology that prevents communication interference by recognizing and protecting vital in-vehicle communication related to vehicle control.
REN2311_Renesas_CoGW_chip_photo-1001x1024.jpg

Faster data exchange through chip-level improvements: Renesas R-Car S4



Details of the new technologies include:

  1. Architecture that optimizes processing performance and power consumption depending on vehicle conditions: Communication gateway SoCs need to deliver processing performance exceeding 30,000 Dhrystone million instructions per second (DMIPS) when running, while also keeping standby power consumption to 2 mW or less in order to maintain battery life. However, high-performance SoCs typically also have high power consumption in standby mode, while low-power SoCs with small standby power consumption have performance issues. To resolve this tradeoff, Renesas combined in a single chip a high-performance application system and a control system optimized for ultralow standby power consumption. The architecture controls the power supplies of these two subsystems and changes the timing of circuit operation to achieve an optimal balance between performance and power efficiency.


  1. Fast start-up technology with external flash memory achieving the same fast speed as embedded flash memory: Since communication gateway SoCs manage processing of critical functions related to vehicle control, they must be able to respond to CAN within 50 milliseconds of start-up. However, if the SoC uses a process that does not support embedded flash memory, the start-up program must be encrypted and stored in external flash memory. This means that it takes additional time to load program data and decrypt it. To solve this issue, Renesas developed technology that splits the program into sections and initially loads and decrypts only an essential portion for start-up, while continuing to load the rest of the program in parallel. This enables a fast response to CAN of 50ms or less, even when using external flash memory.


  1. Highly efficient network accelerator with 10 Gbps/W communication efficiency: To allow air cooling and heat dissipation for ECUs, communication gateway SoCs must keep power consumption to 7 W or less. Since performance of 30,000 DMIPS or higher requires approximately 6 W of power, only around 1 W can be used for network processing. This presents a challenge as the total communication of 10 Gbps must be achieved using 1 W of power, with a processing efficiency of only around 3 Gbps/W when processed by the CPU. To work around this issue, Renesas offloaded processing from the CPU to a custom network accelerator, achieving higher efficiency at 9.4 Gbps/W. Additionally, Renesas boosted efficiency to 11.5 Gbps/W by switching the routing method from a conventional TCAM approach to a hash table in SRAM.


  1. Security technology to prevent interference with communication requiring high reliability: Communication gateway SoCs perform a mixed set of tasks such as data processing related to vehicle control that requires a high level of reliability, and large amounts of random data communication with cloud services and others. Since vehicle control is essential to ensuring safety, protecting and separating mission-critical data is important. However, despite the differences in data types, all data is transmitted through the same in-vehicle network, leading to physical intersections and raising security issues. To address this challenge, Renesas developed security technology that analyzes incoming packets to the SoC. It determines whether or not they contain essential data, and assigns them to different pathways and control functions within the network accelerator. This prevents interference with data that requires high reliability and safeguards in-vehicle data communication from a variety of security threats.
 
  • Like
  • Fire
Reactions: 12 users
Top Bottom