BRN Discussion Ongoing

[Fullmoonfever]

Hi Fmf,

As someone once said:

"4 bits are enough".

...

and what an outlandish idea - binary NNs!

As PvdM has pointed out, the IBM simulation demonstrated that 4-bit deep-learning models in vision, speech, and language, lose little in comparison with 16-bit deep learning.

https://brainchip.com/4-bits-are-enough/

"To dive a little bit deeper into the value of 4-bit, in its 2020 NeurIPS paper IBM described the various pieces that are already present and how they come together. They prove the readiness and the benefit through several experiments simulating 4-bit training for a variety of deep-learning models in computer vision, speech, and natural language processing. The results show a minimal loss of accuracy in the models’ overall performance compared with 16-bit deep learning. The results are also more than seven times faster and seven times more energy efficient."

... and Akida does it with not a MAC in sight, just massively parallel neurons and skeletal sparsity.


As long ago as September 2022, ARM, Intel and Nvidia came to understand that:

“Neural networks are a bit strange in that they are actually remarkably tolerant to relatively low precision,” said Richard Grisenthwaite, executive vice president and chief architect at Arm. “In our paper*, we showed you don’t need 32 bits of mantissa for precision. You can use only two or three bits, and four or five bits of exponent will give you sufficient dynamic range. You really don’t need the massive precision that was defined in 754 [ IEEE 754 floating-point scheme ], which was designed for finite element analysis and other highly precise arithmetic tasks.”


*

FP8 Formats for Deep Learning​

Paulius Micikevicius, Dusan Stosic, Neil Burgess, Marius Cornea, Pradeep Dubey, Richard Grisenthwaite, Sangwon Ha, Alexander Heinecke, Patrick Judd, John Kamalu, Naveen Mellempudi, Stuart Oberman, Mohammad Shoeybi, Michael Siu, Hao Wu

Subjects:	Machine Learning (cs.LG)
Cite as:	arXiv:2209.05433 [cs.LG]
	(or arXiv:2209.05433v2 [cs.LG] for this version)
	https://doi.org/10.48550/arXiv.2209.05433 Focus to learn more

Submission history​

From: Paulius Micikevicius [view email]
[v1] Mon, 12 Sep 2022 17:39:55 UTC (117 KB)
[v2] Thu, 29 Sep 2022 20:47:07 UTC (117 KB)


Thinking of mantissas and exponents locks the thought process and the mathematical implementation into MACs (Multiply Accumulate calculations).

It's like making a road safety code for dinosaurs.

Thought you might appreciate the finer details of the article.

 

[Techinvestor17]

When is the next quarterly being released? Anyone got the date?

Needs to be disclosed by the last trading day of January

 

[buena suerte :-)]

Another positive article and the price still held down lol.

It’s pretty obvious the pressure builds more and the wick is getting shorter, boom!

A little bit of movement

 

[HopalongPetrovski]

A little bit of movement

SHHHHHH....don't frighten the fish.

 

[buena suerte :-)]

SHHHHHH....don't frighten the fish.

Sorry

 

[Rise from the ashes]

A little bit of movement

Of course their is movement didn't expect otherwise.

 

[BaconLover]

Back to 69.

 

[Rise from the ashes]

Back to 69.




View attachment 27200

I woke up and chose filthy mind.
While I'm off topic anyone done a CPR course?
Can you DM me and tell me what's the usual length of course and a few finer details please( getting sorted now no need for further DM) love this place

 

[AARONASX]

I woke up and chose filthy mind.
While I'm off topic anyone done a CPR course?
Can you DM me and tell me what's the usual length of course and a few finer details please( getting sorted now no need for further DM) love this place

Enjoy: https://www.stjohnvic.com.au/media/1932/pfa1d.pdf

 

[Rise from the ashes]

Enjoy: https://www.stjohnvic.com.au/media/1932/pfa1d.pdf

Thank you @AARONASX
Happy you posted this here as it might encourage more people to do a course.

 

[Bravo]

MicroChip's PolarFire 2 SoC FPGAs

Here's something interesting to ponder. After reading this recent article, I'm wondering whether it could have potentially uncovered something that may be referring to us being incorporated in Microchip’s formal rollout of the new mid-range FPGA and SoC family that will occur at the Mi-V conference later this year.

Looking back on the history, we know that BrainChip has a relationship with SiFive. In a press release from SiFive, they said they'll be working with us on the X280 in the Intelligence Series (see below).

View attachment 26829

BrainChip and SiFive partner on next-generation edge AI chips

BrainChip and SiFive have combined the former's Akida architecture with the latter's RISC-V processors to bring AI and ML to the edge.

www.edgecomputing-news.com

And Microchip has been working with SiFive since 2015. And MicroChip and Si-Five and NASA have also been working together. A couple of snippets from this article (below) make me wonder if AKIDA could be what SiFive is referring to as their “Intelligence Extensions,” which they say “are custom instructions that SiFive developed to accelerate AI/ML operations”. I wouldn't be at all surprised if we're involved in some way, shape or form in the roll-out of PolarFire 2 SoC FPGAs later this year. Anyway, it's all very interconnected and exciting IMO but my cousin is coming to lunch in a few minutes time so I'm typing this as fast as my little fingers will allow, so those who have a penchant for dot collecting, can do your thang!

View attachment 26838


View attachment 26835

Does 2+2=4? Microchip announces PolarFire 2; You Do the Math

Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit last month in two presentations including a keynote given by Bruce Weyer, the company’s Corporate VP for FPGAs. Al…

www.eejournal.com

Just to make it clear in regards to the above, I believe there's a very decent chance that we're in NASA’s High Performance Spaceflight Computing (HPSC), in other words in PolarFire 2 SoC via SiFive's X280 processor cores because the timing is spot on within NASA's target time IMO. Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit in December 2022.

 

[SERA2g]

Just to make it clear in regards to the above, I believe we must be in NASA’s High Performance Spaceflight Computing (HPSC), in other words in PolarFire 2 SoC via SiFive's X280 processor cores because the timing is spot on within NASA's target time IMO. Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit in December 2022.


View attachment 27207


View attachment 27205

View attachment 27206


View attachment 27202






View attachment 27203

Good to see the TRL has increased to 4 indicating things are progressing.

I think last time I reviewed SBIR TRL was 2. Seems at the end of this the project will be at 6.

What's My TRL Score?

Technology Readiness Level (TRL) is widely used as an approximate measure of a technology’s maturity level. This method of evaluating a technology was originally created for the aerospace industry, but has been adopted by many other areas of technology as well. The TRL assessment can be used to...

sbirguide.com

The summary of the various TRL levels is as follows:

• TRL 1 is the beginning stages of any technology and encompasses basic research.
• TRL 2 moves from basic technology research into proving the feasibility of the application and applied research.
• TRL 3 moves the technology beyond the paper stage to the experimental stage. Components of the technology are being tested at this phase.
• TRL 4 moves into technology development and is the first step in determining if the components will work together as a system.
• TRL 5 moves the technology from development into demonstration. The technology should almost be at a prototypical level.
• TRL 6 continues with the technology demonstration and begins the true engineering scale, moving beyond the laboratory scale. At this phase, the prototype should be able to perform all the functions required in the operational system and the testing environment should closely resemble the actual operating environment.
• TRL 7 begins system commissioning and requires demonstration of an actual system prototype in a relevant environment. Final design is just about complete.
• TRL 8 proves the technology functions as designed and has been proven to work. This phase represents the end of system development.
• TRL 9 is a system that is fully operational. The technology is complete and is functioning in whole in the targeted environment.

 

[zeeb0t]

Good to see the TRL has increased to 4 indicating things are progressing.

I think last time I reviewed SBIR TRL was 2. Seems at the end of this the project will be at 6.

View attachment 27209

What's My TRL Score?

Technology Readiness Level (TRL) is widely used as an approximate measure of a technology’s maturity level. This method of evaluating a technology was originally created for the aerospace industry, but has been adopted by many other areas of technology as well. The TRL assessment can be used to...

sbirguide.com

The summary of the various TRL levels is as follows:

• TRL 1 is the beginning stages of any technology and encompasses basic research.
• TRL 2 moves from basic technology research into proving the feasibility of the application and applied research.
• TRL 3 moves the technology beyond the paper stage to the experimental stage. Components of the technology are being tested at this phase.
• TRL 4 moves into technology development and is the first step in determining if the components will work together as a system.
• TRL 5 moves the technology from development into demonstration. The technology should almost be at a prototypical level.
• TRL 6 continues with the technology demonstration and begins the true engineering scale, moving beyond the laboratory scale. At this phase, the prototype should be able to perform all the functions required in the operational system and the testing environment should closely resemble the actual operating environment.
• TRL 7 begins system commissioning and requires demonstration of an actual system prototype in a relevant environment. Final design is just about complete.
• TRL 8 proves the technology functions as designed and has been proven to work. This phase represents the end of system development.
• TRL 9 is a system that is fully operational. The technology is complete and is functioning in whole in the targeted environment.

Test

 

[Diogenese]

MicroChip's PolarFire 2 SoC FPGAs

Here's something interesting to ponder. After reading this recent article, I'm wondering whether it could have potentially uncovered something that may be referring to us being incorporated in Microchip’s formal rollout of the new mid-range FPGA and SoC family that will occur at the Mi-V conference later this year.

Looking back on the history, we know that BrainChip has a relationship with SiFive. In a press release from SiFive, they said they'll be working with us on the X280 in the Intelligence Series (see below).

View attachment 26829

BrainChip and SiFive partner on next-generation edge AI chips

BrainChip and SiFive have combined the former's Akida architecture with the latter's RISC-V processors to bring AI and ML to the edge.

www.edgecomputing-news.com

And Microchip has been working with SiFive since 2015. And MicroChip and Si-Five and NASA have also been working together. A couple of snippets from this article (below) make me wonder if AKIDA could be what SiFive is referring to as their “Intelligence Extensions,” which they say “are custom instructions that SiFive developed to accelerate AI/ML operations”. I wouldn't be at all surprised if we're involved in some way, shape or form in the roll-out of PolarFire 2 SoC FPGAs later this year. Anyway, it's all very interconnected and exciting IMO but my cousin is coming to lunch in a few minutes time so I'm typing this as fast as my little fingers will allow, so those who have a penchant for dot collecting, can do your thang!

View attachment 26838


View attachment 26835

Does 2+2=4? Microchip announces PolarFire 2; You Do the Math

Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit last month in two presentations including a keynote given by Bruce Weyer, the company’s Corporate VP for FPGAs. Al…

www.eejournal.com

Hi Bravo,

Fantastic research (as usual).

A few interesting spikes, but I don't think it reaches the synaptic threshold ... yet.

One negative spike is the reference to "custom instructions that SiFive developed to accelerate neural network computation".

SiFive Intelligence X280 - SiFive

SiFive Intelligence X280

The SiFive Intelligence™ X280 is a multi-core capable RISC-V processor with vector extensions and SiFive Intelligence Extensions and is optimized for AI/ML compute at the edge.

www.sifive.com

To me, this reads as in-house software that SiFive developed. Now, as we all know, Akida could do this much faster and more efficiently, so there is definite scope for the inclusion of Akida in lieu ... and that is probably the objective of the BrainChip/SiFive partnership, but I don't think it has quite come to fruition yet.

No doubt they have done the simulations, but I don't think they would have the production silicon yet, though I'd be more than happy to be proved wrong.

 

[DollazAndSense]

This is by all means not new information from NVISO's website.. but sometimes it's easy to forget that while we expect Brainchip to put numbers on the board, legislation is applying time pressure on manafacturers to implement monitoring systems that is highly unlikely Akida won't be a part of:

• "6th July 2022 the new Regulation (EU) 2019/2144 of the European Parliament and of the Council has mandated driver drowsiness and attention warning (DDAW) systems for all new type-approved motor vehicles of categories M and N from 6 July 2022 and from 7 July 2024 for all new vehicle registrations. This regulation is expected to accelerate the adoption of AI within interior monitoring systems of drivers and occupants."

7th July 2024 is not that far away and these systems will have to be proven compliant BEFORE this date.

 

[wilzy123]

Test

 

[Diogenese]

View attachment 27214

Somebody post something so we don't have to keep looking at Wilzy!

 

[wilzy123]

Somebody post something so we don't have to keep looking at Wilzy!

 

[Esq.111]

Afternoon Chippers,

Diogenese, if we asked nicely, Rocket might indulge us with another lavatory roll conundrum.

Thankyou for all your technical knowledge, I would be lost without it.

Regards,
Esq.

 

[Deadpool]

View attachment 27214

I'm Wilzy Wilzy Gump