BRN Discussion Ongoing

[thelittleshort]

This just looks downright interesting…and relevant. From a tweet that popped up on my feed - relating to the Human Brain Project and neuromorphic computing

Neuromorphic Computing - EBRAINS

Simulate or emulate spiking neural networks with neuromorphic compute systems

ebrains.eu

https://sos-ch-dk-2.exo.io/public-website-production/filer_public/63/0d/630d6561-e26a-4e74-84bf-b5cbc63deab4/hbp_brochure_spotlights_digital_lowres.pdf

 

[Esq.111]

Ruble's Plunge Is Expected to Drive Surge in Russian Inflation

2 days ago — The ruble was quoted at 110 to 120 per dollar by Russian banks on Sunday. It had traded at 75 before Russia's invasion

Evening Chippers,

Great work with all the dots everyone.

After consuming vast amounts of amber liquid this afternoon a couple of things kept going through my mind.

1, Roughly 65 individuals employed by to company to date...

65 employees
X 8 hours per day.
= 520 hours per day globally.
X 5 days per week
= 2, 500 hrs per week
X 50 weeks per year
130,000 man , woman hours per year .

THERE MUST BE A SHIP LOAD GOING ON.

And I think , from memory, Rob T .
Said they belive / NEED to have around 100 employees in their engage by years end to deal with every thing which is happening.

That's a heck of a lot of man / woman hours hours.

2, Russia has peen cut off from SWIFT.

This is the first time ever, in my life I have ever seen SWIFT mentioned in main stream media.

SWIFT.

Society for
Worldwide
Interbank
Financial
Telecommunications.

This is massive, SWIFT transact something in the order of $5 TRILLION DOLLARS PRE DAILY worldwide.

* I would very much like BRN to have a relationship with this bunch of charecters.
Not that such an engagement would ever be divulged to the market.

Thoughts go out to Ukraine.

Regards,
Esq.

 

[Galaxycar]

Is it just me or is anyone else sencing a full blown merger with ARM prior to arms listing listing on the Nasdaq this year,explains the heavy short attacks,ie co-ordinated by JP MORGAN.. We get offered shares in the new entity or $ offer, Just seems shorts/manipulation is non abating, as if they know the end point. Just a discussion point but making more sense as time goes on especially with latest board appointment

 

[Build-it]

AAAARGGHH here i am overseas and my car has been borrowed by a family member and i find out today SOMEONE HAS STOLEN or its missing The FRONT GREEN AKIDA PLATE!!!!

Nooooooooo not my Akida plate!

Some bloody Brainchip fan may now have it on their wall!!! Unless someine is driving around with one plate or it fell off.

If anyone in South east qld finds it let me know Reward - 50 shares or a bottle of bubbles

Come back my green Akida plate

 

[Build-it]

Hi MD,
I hope all goes well with the search for the car plate, although your car was not stolen can you imagine if there was a tech company out there that could offer facial recognition, keyword spotting & visual wake word that would avoid the inconvenience of cars being stolen.

One would think all insurance company's would lobby car makers to implement such a unique tech and avoid car replacements or pay outs.

Edge Compute.

 

[VictorG]

I thought I'd post this link to an overseas brokerage firm promoting BRN as an investment opportunity. It's a bit old and repetitive but hits all the right marks. Also good to see how BRN is being noticed by overseas brokers.
May need Google translation.

Brainchip Aktie (24Y) 2024: Was macht BrainChip?

Brainchip Aktie (24Y) 2024 | Mercedes könnte der Brainchip Aktie Auftrieb geben » BrainChip Wachstumspotenzial vorhanden » Infos hier!

www.brokerdeal.de

VG

 

[Diogenese]

This just looks downright interesting…and relevant. From a tweet that popped up on my feed - relating to the Human Brain Project and neuromorphic computing

Neuromorphic Computing - EBRAINS

Simulate or emulate spiking neural networks with neuromorphic compute systems

ebrains.eu

View attachment 2102

View attachment 2103

https://sos-ch-dk-2.exo.io/public-website-production/filer_public/63/0d/630d6561-e26a-4e74-84bf-b5cbc63deab4/hbp_brochure_spotlights_digital_lowres.pdf

Hi tls,

SpiNNaker is a warehouse full of networked ARM processors running NN software programs.

BrainScales uses analog (MemRistor/ReRAM) neurons.

Both Spinnaker and Brainscales are academic research tools and are not intended for commercialization.

https://www.humanbrainproject.eu/en/silicon-brains/
The large-scale neuromorphic machines are based on two complementary principles. The many-core SpiNNaker machine located in Manchester (UK) connects 1 million ARM processors with a packet-based network optimized for the exchange of neural action potentials (spikes) (a comprehensive description is available in a free, open access book about SpiNNaker). The BrainScaleS physical model machine located in Heidelberg (Germany) implements analogue electronic models of 4 Million neurons and 1 Billion synapses on 20 silicon wafers. Both machines are integrated into the HBP collaboratory and offer full software support for their configuration, operation and data analysis.

The most prominent feature of the neuromorphic machines is their execution speed. The SpiNNaker system runs at real-time, BrainScaleS is implemented as an accelerated system and operates at 10,000 times real-time. Simulations at conventional supercomputers typical run factors of 1000 slower than biology and cannot access the vastly different timescales involved in learning and development ranging from milliseconds to years.


https://www.nowpublishers.com/article/BookDetails/9781680836523
2. The SpiNNaker Chip
Jim Garside | Luis A. Plana
There are many possible levels at which a model can be built, ranging from direct electronic models of the neurons (which can process many times faster than biology) [114] to massive computers that trawl through enormous data sets at great speed [199]; each approach has its merits and demerits. SpiNNaker [65] was designed to function somewhere in the middle of this spectrum. To provide the flexibility to experiment with neuron models, it was determined that these should be implemented in software. Running software carries a significant overhead in both performance and power consumption: the former can be addressed by using a large array of processors, since the problem is amenable to a massively parallel-processing solution; the latter concern was tackled by employing power-efficient rather than fast microprocessors.

...
The original target of 1000 neurons per core has proved optimistic, partly because the desired neuron models have become more complex,2 as have the synapse models, and the number of synapses per neuron can also be higher than the original target. Depending on the models used, up to 256 neurons per subsystem is proving tractable, and currently, this is the maximum number of neurons per core supported by the software. Memory can also be a limiting factor. As something close to two-thirds of the processor subsystem’s area is RAM as it is, a better way of thinking about the device is as a set of RAMs with attached processors, rather than the other way around. In this view, the RAM limits the number of neurons and synapses in each subsystem: the alternative would be to have larger RAMs by reducing the number of processors.


https://www.humanbrainproject.eu/en/silicon-brains/how-we-work/hardware/
The BrainScaleS-1 waferscale system is based on physical (analogue or mixed-signal) emulations of neuron, synapse and plasticity models with digital connectivity, running up to ten thousand times faster than real time.

The next generation BrainScaleS-2 single chip system with 512 point neurons or a lower number combined to structured neurons and with programmable plasticity is accessible for usage via PyNN both for batch submissions and (since October 2021) for interactive use via the EBRAINS Collaboratory. The system runs 1000x faster that biological real time.


https://www.researchgate.net/figure...nded-chip-on-its-carrier-board_fig1_358142449

Overview of the BrainScaleS-2 System architecture. (A) Bonded chip on its carrier board, one can see the two synaptic crossbar arrays. (B) Test setup, with the chip (covered by white plastic) mounted on a carrier board. The FPGA and I/O boards have been designed by our collaboration partners at TU Dresden. (C) Schematic floorplan of the chip: Two processor cores with access to the synaptic crossbar array are on the top and bottom. The 512 neuron circuits and analog parameter storage are arranged in the middle. The event router routes events generated by the neurons and external events to the synapse drivers and to/from the digital I/O located on the left edge of the chip. (D) Conceptual view of the system architecture in spike processing mode: Event packets (red dot) get injected by the synapse driver into the synaptic crossbar, where they cause synaptic input integration to occur in synapses with matching addresses (indicated by red lines). Membrane voltage accumulation eventually results in spike generation in the associated neuron circuits. The resulting spikes are routable to both synapse drivers or external output. The plasticity processing unit has low latency and massively parallel access to synaptic weights, addresses, correlation measurements, and neuron membrane voltage dynamics during operation. Plasticity rules and other learning algorithms can use these observables to modify all parameters determining network emulation in an online fashion.​

 

[Diogenese]

AAAARGGHH here i am overseas and my car has been borrowed by a family member and i find out today SOMEONE HAS STOLEN or its missing The FRONT GREEN AKIDA PLATE!!!!

Nooooooooo not my Akida plate!

Some bloody Brainchip fan may now have it on their wall!!! Unless someine is driving around with one plate or it fell off.

If anyone in South east qld finds it let me know Reward - 50 shares or a bottle of bubbles

Come back my green Akida plate

When you get your Mercedes EQXX you'll find it has a 1000 volt battery.

As the bodywork is recycled plastic, it shouldn't be too difficult to hook the plates up ...

 

[Pocketchange321]

Just saw this on Twitter and thought it may be of interest to some. A webinar debate about:

The future of high-performance computing: are neuromorphic systems the answer?



Titans of the tech field will go head to head to convince each other of where they believe the future of computing lies.

Neuromorphic Computing and Engineering editorial board members Kwabena Boahen and Ralph Etienne-Cummings, will attempt to convince Yann LeCun and Bill Dally of the benefits of neuromorphic computing over mainstream neural computing.


About the speakers:

Yann LeCun is chief AI scientist at Meta and professor at New York University. An ACM Turing Award laureate for his research on deep learning, Yann also researches computer vision, robotics and computational neuroscience. He does not think that neural computing needs to be neuromorphic to be effective.

Bill Dally is chief scientist at NVIDIA and a professor at Stanford University. With his Stanford team, Bill developed much of the technology that is found in most large parallel computers today and previously made significant advances at MIT and CalTech. He remains to be convinced of the need for neuromorphic computing.

Kwabena Boahen is the founder and director of Stanford’s Brains in Silicon lab. The lab develops silicon integrated circuits that emulate the way neurons compute and computational models that link neuronal biophysics to cognitive behaviour. This bridges neurobiology and medicine with electronics and computer science. Kwabena is a firm believer in the power of neuromorphic computing.

Ralph Etienne-Cummings directs the Computational Sensory-Motor Systems Laboratory at Johns Hopkins University. Ralph’s research spans a range of electrical and computer-engineering topics. Including, but not limited to, mixed-signal VSLI systems, computational sensors, computer vision, neuromorphic engineering, smart structures, mobile robotics and neuroprosthetic devices. His research has convinced him of the need for neuromorphic computing.

Chair

Regina Dittmann currently works at the Peter Grünberg Institute, Forschungszentrum Jülich. Since November 2012, Regina has been a professor at RWTH Aachen University, in the Department of Electrical Engineering and Information Technology. She is an expert in the growth and understanding of memristive materials and devices that make modern high-performance computing possible.

wauw ok, the 2 People working for companies that don't stand to benefit from a neuromorphic shift need to be convinced? Mystifying!

 

[Violin1]

Thank you!

Deliver 4 MILLION RUBLES OR THE NUMBER PLATE GETS IT!! No, wait 4.5 MILLION. Damn, make that 5 MILLION......bloody inflation....

 

[stockduck]

and.......didn`t you hear him speak.....? Then get it done...great speech, because of many more right time decissions for american people ....and this:

Biden to Congress: Pass That Bill to Fund US Chip Manufacturing

The president also called for more privacy protections on social media.

www.cnet.com

"President Joe Biden called on Congress to pass the CHIPS Act, a law that would provide chipmakers with $52 billion in subsidies to advance semiconductor manufacturing in the United States, during his State of the Union speech Tuesday.

Biden lauded Intel Chief Executive Pat Gelsinger, who last month announced a $20 billion investment for two new chip fabrication facilities, or fabs, that the company will build just west of Columbus, Ohio. Intel plans to spend $100 billion to build the Ohio "megafab" over the next decade, with an eventual total of eight fabs, but the speed of that investment will depend on the US subsidy, Gelsinger has said."

Why Intel CEO Pat Gelsinger was a guest at President Biden's State of the Union address

Intel's CEO Pat Gelsinger is choosing big domestic chip manufacturing investments over short-term shareholder rewards, and he has a big fan: President Biden.

www.cnbc.com

May the force be with you!

 

[FJ-215]

What's rubles? Russian toilet paper?

Yep.

Putin is pure evil.

Politically savvy though, has been running rings around the west for decades. Question is, where does this end?

 

[thelittleshort]

Hi tls,

SpiNNaker is a warehouse full of networked ARM processors running NN software programs.

BrainScales uses analog (MemRistor/ReRAM) neurons.

Both Spinnaker and Brainscales are academic research tools and are not intended for commercialization.

https://www.humanbrainproject.eu/en/silicon-brains/
The large-scale neuromorphic machines are based on two complementary principles. The many-core SpiNNaker machine located in Manchester (UK) connects 1 million ARM processors with a packet-based network optimized for the exchange of neural action potentials (spikes) (a comprehensive description is available in a free, open access book about SpiNNaker). The BrainScaleS physical model machine located in Heidelberg (Germany) implements analogue electronic models of 4 Million neurons and 1 Billion synapses on 20 silicon wafers. Both machines are integrated into the HBP collaboratory and offer full software support for their configuration, operation and data analysis.

The most prominent feature of the neuromorphic machines is their execution speed. The SpiNNaker system runs at real-time, BrainScaleS is implemented as an accelerated system and operates at 10,000 times real-time. Simulations at conventional supercomputers typical run factors of 1000 slower than biology and cannot access the vastly different timescales involved in learning and development ranging from milliseconds to years.


https://www.nowpublishers.com/article/BookDetails/9781680836523
2. The SpiNNaker Chip
Jim Garside | Luis A. Plana
There are many possible levels at which a model can be built, ranging from direct electronic models of the neurons (which can process many times faster than biology) [114] to massive computers that trawl through enormous data sets at great speed [199]; each approach has its merits and demerits. SpiNNaker [65] was designed to function somewhere in the middle of this spectrum. To provide the flexibility to experiment with neuron models, it was determined that these should be implemented in software. Running software carries a significant overhead in both performance and power consumption: the former can be addressed by using a large array of processors, since the problem is amenable to a massively parallel-processing solution; the latter concern was tackled by employing power-efficient rather than fast microprocessors.

...
The original target of 1000 neurons per core has proved optimistic, partly because the desired neuron models have become more complex,2 as have the synapse models, and the number of synapses per neuron can also be higher than the original target. Depending on the models used, up to 256 neurons per subsystem is proving tractable, and currently, this is the maximum number of neurons per core supported by the software. Memory can also be a limiting factor. As something close to two-thirds of the processor subsystem’s area is RAM as it is, a better way of thinking about the device is as a set of RAMs with attached processors, rather than the other way around. In this view, the RAM limits the number of neurons and synapses in each subsystem: the alternative would be to have larger RAMs by reducing the number of processors.


https://www.humanbrainproject.eu/en/silicon-brains/how-we-work/hardware/
The BrainScaleS-1 waferscale system is based on physical (analogue or mixed-signal) emulations of neuron, synapse and plasticity models with digital connectivity, running up to ten thousand times faster than real time.

The next generation BrainScaleS-2 single chip system with 512 point neurons or a lower number combined to structured neurons and with programmable plasticity is accessible for usage via PyNN both for batch submissions and (since October 2021) for interactive use via the EBRAINS Collaboratory. The system runs 1000x faster that biological real time.


https://www.researchgate.net/figure...nded-chip-on-its-carrier-board_fig1_358142449
View attachment 2107

Overview of the BrainScaleS-2 System architecture. (A) Bonded chip on its carrier board, one can see the two synaptic crossbar arrays. (B) Test setup, with the chip (covered by white plastic) mounted on a carrier board. The FPGA and I/O boards have been designed by our collaboration partners at TU Dresden. (C) Schematic floorplan of the chip: Two processor cores with access to the synaptic crossbar array are on the top and bottom. The 512 neuron circuits and analog parameter storage are arranged in the middle. The event router routes events generated by the neurons and external events to the synapse drivers and to/from the digital I/O located on the left edge of the chip. (D) Conceptual view of the system architecture in spike processing mode: Event packets (red dot) get injected by the synapse driver into the synaptic crossbar, where they cause synaptic input integration to occur in synapses with matching addresses (indicated by red lines). Membrane voltage accumulation eventually results in spike generation in the associated neuron circuits. The resulting spikes are routable to both synapse drivers or external output. The plasticity processing unit has low latency and massively parallel access to synaptic weights, addresses, correlation measurements, and neuron membrane voltage dynamics during operation. Plasticity rules and other learning algorithms can use these observables to modify all parameters determining network emulation in an online fashion.​

Thanks for the clarification Dio

 

[MDhere]

Hi MD,
I hope all goes well with the search for the car plate, although your car was not stolen can you imagine if there was a tech company out there that could offer facial recognition, keyword spotting & visual wake word that would avoid the inconvenience of cars being stolen.

One would think all insurance company's would lobby car makers to implement such a unique tech and avoid car replacements or pay outs.

Edge Compute.

Totally agree buildit. I wish i had the cameras already on my car and detection of anyone going anywhere near my plates!

 

[MDhere]

Deliver 4 MILLION RUBLES OR THE NUMBER PLATE GETS IT!! No, wait 4.5 MILLION. Damn, make that 5 MILLION......bloody inflation....

Ha i aint touching dirty money. i can offer you 5 of these instead!

in exchange for my plate

 

[sleepymonk]

Please do Zed!

Ha i aint touching dirty money. i can offer you 5 of these instead! View attachment 2125 in exchange for my plate

Sounds sweet to me, will look out 4 u when I drive to Brisbane today.

 

[butcherano]

Ok guys...don't shoot the messenger!...

Negative video just released from our old mate at Nanalyze.

I've tried to reply with a couple of reasonable comments regarding the early revenue from Brainchip Studio but they're getting deleted almost straight away. I think it was because I tried to compare our revenue from Studio vs Akida, with Steve Jobs' revenue from selling his volkswagon and calculator to fund the first Apple computer. He obviously didn't see the humour (or reality) in it...

 

[butcherano]

And a positive podcast to make up for my last post!...

Al and Rob Telson discuss Brainchip and Edge

Want to be featured as a guest on Making Data Simple? Reach out to us at [almartintalksdata@gmail.com] and tell us why you should be next. AbstractMaking Data Simple Podcast is hosted by Al Martin, WW VP Account Technical Leader IBM …

allainews.com

 

[butcherano]

Ok guys...don't shoot the messenger!...

Negative video just released from our old mate at Nanolyze.

I've tried to reply with a couple of reasonable comments regarding the early revenue from Brainchip Studio but they're getting deleted almost straight away. I think it was because I tried to compare our revenue from Studio vs Akida, with Steve Jobs' revenue from selling his volkswagon and calculator to fund the first Apple computer. He obviously didn't see the humour (or reality) in it...

These were my comments that I posted on the youtube link FYI. They've all disappeared, so I don't like our chances with engaging in a constructive discussion with him...

--------------------------------------------------------

Couple of points I wouldn’t mind discussing. Firstly, Brainchip completed a back door listing on the ASX through Aziana rather than going down the path of an IPO. This is common, legitimate and not should not be considered a red flag. You imply that it was the Aziana geotechs that decided to change their career path into technology and are responsible for developing the world class technology of Brainchip which is misleading. None of the management team, board of directors or anyone working for Brainchip has come from Aziana.

Secondly, the lack of revenue that you discuss for the majority of this video is relating to Brainchip Studio which is a software suite. This is an entirely different product to Akida which is a neural networking processor on hardware which is only now available in commercial chip sales and IP licensing.

Revenue from Brainchip Studio was not intended to be mind blowing. Simply to assist with offsetting overheads and R&D costs.

What you are implying with your video about Brainchip is the equivalent of criticising Steve Jobs for making a pitiful revenue by selling his volkswagon and calculator to help fund the development of the first Apple computer.

Brainchip’s revenue forecast is shown in the AGM Address and Presentation announced by the company on 26/05/2021. This shows revenue beginning this year and ramping up in 2023 and beyond. Refer to page 32 of 38 in the below link (or slide 20 of the preso). Year 1 = 2021.

https://www.asx.com.au/asx/statistics/displayAnnouncement.do?display=pdf&idsId=02378372

 

[BaconLover]

So this is interesting. We have seen a similar SAMSUNG fridge before.

A proof of concept by ARM using a unity based app. Opportunity to scale. Plenty of use cases.

Unity Real-Time Development Platform | 3D, 2D, VR & AR Engine

Create and grow real-time 3D games, apps, and experiences for entertainment, film, automotive, architecture, and more. Get started with Unity today.

unity.com

ARM are mates with Unity.
Unity are mates with Nintendo.
Nintendo are mates with Megachips.
Megachips are mates with Brainchip.