BrainChip + SiFive

Proga

Regular
True but SiFive could be a giant and rising together isn't a problem and makes communicating to the market more powerful. Also the quicker we leave the ASX the better. Intel is getting as close as they can to SiFive since their t/o offer rejected and each day that goes by the takeover price rises as the reality of RISC-V processors becomes understood.
My shares are in my super fund which I'm self managing within my fund (they handle all the tax etc). I can't own OS shares so definitely don't want BRN to move off the ASX. There are a lot of holders like me.

Would be dumb to limit Akida by tying it to SiFive.
 
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ndefries

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My shares are in my super fund which I'm self managing within my fund (they handle all the tax etc). I can't own OS shares so definitely don't want BRN to move off the ASX. There are a lot of holders like me.

Would be dumb to limit Akida by tying it to SiFive.
have to clarify that with an SMSF you choose exactly how your super is invested. Whether you want to invest in index funds, Australian shares or international shares, the choice is yours. Potentially your SMSF provider has limited your option but that is not a default block industry wide.
 
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Proga

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have to clarify that with an SMSF you choose exactly how your super is invested. Whether you want to invest in index funds, Australian shares or international shares, the choice is yours. Potentially your SMSF provider has limited your option but that is not a default block industry wide.
It's not a SMSF. It's the ability to buy shares within your existing industry fund with some rules. 1 is you can only buy shares within the ASX300. It's a personal choice to use it.

Most super funds offer the same service now. I think they were losing too many customers to SMSF's.
 
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It's not a SMSF. It's the ability to buy shares within your existing industry fund with some rules. 1 is you can only buy shares within the ASX300. It's a personal choice to use it.

Most super funds offer the same service now. I think they were losing too many customers to SMSF's.
I think the correct term is Direct Invest in the investment options. A really good option which gives you a level of control over your financial future.
 
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Deleted member 118

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Not sure if it’s off any interest to anyone.

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Perhaps

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I guess the role of Qualcomm in the SiFive/Brainchip collaboration is highly underrated up to now. Remember Brainchip is the first IP ever that will be integrated in SiFive Risc V circuits, maybe just to complete things.
2019:
2020:
 
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Bloodsy

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SiFive and BrainChip collaborate to achieve IP compatibility


IP compatibility today ...... Paying IP customer tomorrow! ;)
 
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SiFive and BrainChip collaborate to achieve IP compatibility


IP compatibility today ...... Paying IP customer tomorrow! ;)
Translation:

SiFive and BrainChip collaborate to achieve IP compatibilityWith increasing attention to RISC-V

Published at 11:30 on May 09, 2022
[Sally Ward-FoxtonEE Times]
SiFive and BrainChip have announced that they will collaborate to demonstrate compatibility in SoC (System on Chip) design for embedded AI (artificial intelligence) of their IPs. We have already demonstrated how BrainChip's Neuromorphic Processing Unit (NPU) IP (Intellectual Property) works in conjunction with SiFive's RISC-V host processor IP.
BrainChip's NPU processor IP can accelerate SNNs (spiking neural networks). It is also installed in the company's neuromorphic processor SoC (System on Chip) "Akida". The IP is a real-time application that can analyze inputs from various types of sensors, such as cameras, with ultra-low power consumption.
BrainChip's NPU processor IP is also installed in the company's "Akida" [Click to enlarge] Source: BrainChip
In a recent demo, BrainChip recognizes the driver's face and voice at the same time by mounting the Akida chip in the car and detecting the driver. The required power consumption is 600μW for keyword spotting, 22mW for face recognition, and 6-8mW for the visual wake word used to detect the driver.
RISC-V processor IP provider SiFive offers the "Intelligence" family of multi-core RISC-V processors with vector extensions optimized for AI workloads on edge devices.
In an interview with EE Times, Chris Jones, vice president of products at SiFive, said, "BrainChip can run its own AI algorithms, but if it's moving to a larger system, it's a host processor. It is possible to choose a host processor that only performs scheduling or a host processor that actually performs AI processing. This is the entry field for SiFive's products. "
"In SoC designs for edge AI, AI workloads are usually split between host processors, vector processors, and AI accelerators. Some edge workloads are from dedicated AI accelerators," said Jones. It is better to process with a general-purpose processor. "
"For BrainChip, it's very beneficial to work with industry leaders to ensure a seamless integration experience for our customers. If BrainChip provides the essential software that can run on the host processor, it's an end. It makes it easier for users to integrate their products and our products, "Jones said.
"The efforts we've made so far are just a few. We've just succeeded in demonstrating compatibility between BrainChip's IP and SiFive's RISC-V architecture," said Jones. explain. The two companies will continue to work toward the realization of software and hardware IP integration by building a continuous collaboration system.
"We plan to carry out ambitious plans in the future," he said. "With the increasing focus on vector processing in AI and image processing, SiFive has made great strides in bringing vector processing to market over the past year," he said.
SiFive is also looking to build an ecosystem of AI accelerator IP providers with products compatible with its host processor IP. "Collaboration with BrainChip is not exclusive. BrainChip is the first partner we have announced, but we are negotiating with many other players," Jones said.
"We are actively seeking partnerships with people with innovative technologies. For companies developing IP and chips, RISC-V as a platform should not be ignored," he said.
 
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Bloodsy

Regular
Hey chippers - following video popped up in my YouTube recommended which I found super insightful and very easy to understand in regards to RISC-V and SiFive! Old mate reckons RISC-V will be up there with X86 and ARM IP.

Trends seem to suggest that countries and companies are moving towards RISC-V and SiFive is a massive player in the space! Brainchip being a value add to SiFive and potentially other partners will be fantastic!!

 
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Terroni2105

Founding Member
Hey chippers - following video popped up in my YouTube recommended which I found super insightful and very easy to understand in regards to RISC-V and SiFive! Old mate reckons RISC-V will be up there with X86 and ARM IP.

Trends seem to suggest that countries and companies are moving towards RISC-V and SiFive is a massive player in the space! Brainchip being a value add to SiFive and potentially other partners will be fantastic!!


Yes really easy to understand Bloodsy, thanks for sharing
 
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Deleted member 118

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RISC-V CEO seeks 'world domination' by winning over the likes of Intel​

We speak to the head of ISA's governing body on industry adoption, timelines, and more​

Dylan Martin Sat 7 May 2022 // 13:22 UTC
40 comment bubble on white

INTERVIEW The CEO of RISC-V's governing body says she wants to nothing less than "world domination" for the rising open-source processor technology, but to do that, the nonprofit needs buy-in from a variety of organizations, even those steeped in dominant, proprietary architectures, such as x86 giant Intel.
In an interview this week with The Register, RISC-V International CEO Calista Redmond reckons the buy-in, which comes in the form of paid memberships, is needed to support ongoing development of the royalty-free CPU instruction set architecture to better compete with x86 and Arm ISAs.
"We have to have a level of funding in order to operate and manage this special rodeo of ours," she says.
Redmond, an IBM veteran, pitches involvement in RISC-V International, which gives paying members an extra level of say in the ISA's future development, as a more even playing field for tech companies than what has been allowed with proprietary ISAs, namely x86 and Arm.
"What everybody gets from this is the vested collective interests of everyone involved to say, 'My destiny isn't pinned to any one or five companies. Everyone's investing together, therefore, my level of risk is much lower'," she says.
When Intel joined RISC-V International in February, it became a premium member, the top membership tier that gave the semiconductor giant a seat on the nonprofit's board and the Technical Steering Committee, which determines new features and specifications for the ISA.
For those privileges, Intel and the other 19 premium members each chip in an annual fee of $250,000, according to the nonprofit's website.
Redmond characterizes the interest of these premier members like this:
I want to really underwrite this thing because it helps me with my own commercialization as well as builds the ecosystem that fosters continued momentum across the industry, where I will find development partners, customers, new opportunities, growing all of that stuff that makes something really strategically durable.
Besides Intel, other major companies with premier memberships include Alibaba Cloud, Google, Huawei, Unisoc, Western Digital, and ZTE.
The premier members also range from startups like StarFive, Ventana and Micro Systems, to SiFive, the latter of which is hoping to go public in the next two years with a RISC-V CPU licensing business.
There are many more RISC-V International members at the "strategic" level, which still gives them the ability to weigh in on the future development on the ISA but not at the same level as premier members.
These members, which include Canonical, Nvidia, and Samsung, pay as much as $35,000 for an annual membership. Smaller organizations pay half or less.
But it's not just companies that are members. RISC-V's more than 2,400 members also include universities, and government-related entities.
Just last week, India's government announced that it had become a premier member and revealed a RISC-V roadmap for homegrown processors.
Another significant government-related entity with premium membership is the Chinese Academy of Sciences, which participates through its Institute of Software and Institute of Computing Technology. The academy is on the US Entity List of trade-restricted organizations, which underlines the unique position RISC-V is in with its open-source nature amid international tensions.
But Redmond says that, as with other countries, such as Russia, RISC-V International is "not required to block anybody from engaging and participating," though the organization will make changes if needed.
"If things go the way of sanctions that are heavier on a country level, we may need to pivot, but at this point we are abiding by things and [are] in very close contact in understanding what are other open source and global organizations doing," she says.

CEO has nuanced view of what RISC-V's rise will look like​

For member companies that have historically been associated with proprietary ISAs, such as x86 or Arm, Redmond tells us they are looking at RISC-V to diversify their risk. It also gives these companies another ISA to support their increasing heterogenous computing needs.
"It makes business sense to do it," she says.
In the case of Intel, Redmond thinks the x86 giant's involvement with RISC-V is helping support the company's revitalized contract manufacturing business, which has vowed to make custom chips for others using x86, Arm or RISC-V ISAs as part of a larger comeback plan.
While Intel's move to support RISC-V could seen as a conflict with the semiconductor giant's traditional x86 business, Redmond admits that she doesn't think RISC-V poses an existential threat.
"This isn't inside information, but I'm pretty sure they're not too worried about their x86 business. I mean, they've locked that in. They've got so many customers that have some millions into that already. People are not typically ripping out existing investments," she says.
However, Redmond does see an opportunity for RISC-V to win business in new and emerging workloads, and she thinks over time devices and IT infrastructure will increasingly shift to the open-source ISA.
"Now one or two generations down the line as you continue to advance and evolve your portfolio, I expect many of those may shift to RISC-V," she says.
But Redmond has a more nuanced view of what a world filled with more RISC-V designs will look like. She doesn't necessarily believe x86 and Arm will fall out of fashion. Instead, she suspects tech companies will increasingly see RISC-V, x86 and Arm ISAs as tools within the same toolbox. This will lead to a greater mix of ISAs used in devices and IT infrastructure, which is already starting to play out.
For instance, Intel uses Arm core designs for some products, including its Mount Evans infrastructure processing unit. AMD relies on Arm for hardware-based security within its processors, and its reportedly looking at incorporating RISC-V into future products. While Nvidia is expanding its use of Arm with upcoming server CPUs, it also uses RISC-V within its GPUs, as does Imagination, which backs the architecture.
"You start to look at technology and hardware differently as building blocks rather than a blind allegiance," says the CEO.

RISC-V can move faster than Arm​

It's important to note that RISC-V, for the most part, is pretty far out from powering mainstream processors in servers and PCs.
Patrick Little, CEO of RISC-V designer SiFive, told us in March he doesn't expect to see commercial processors using the company's designs in PCs until late 2025, and server efforts will take longer than that.
It should be noted too that Arm has only just started to become a serious contender in PCsand servers over the past couple years.
But Redmond says that Google and other so-called hyperscalers are working on RISC-V projects "under the covers" and pointed out that the ISA is also used in microcontrollers in storage devices from companies like Western Digital and Seagate.
She also highlights Alibaba Cloud's XuanTie RISC-V processors, which have been marketed for networking devices, gateways and edge servers [PDF].
intel

Intel joins RISC-V governing body, pledges $1bn fund for chip designers

READ MORE
Another company, Esperanto Technologies, is testing its 1,000-core RISC-V AI chip with Samsung's IT services arm and other companies, Redmond noted. We also know of another startup, Ventana Micro Systems, that is building RISC-V server chips.
Redmond didn't cite any examples of PC activities. We do know that SiFive launched a RISC-V development board for desktops in late 2020, for instance, while Microchip offersRISC-V boards, folks are recreating the TRS-80 Model 100 with a RISC-V system-on-chip... it's safe to say various projects and products are on the go.
She promises we will see more examples of RISC-V implementations of both servers and PCs later this year.
"You're going to see a laptop this year. You're going to see more datacenter implementation stories this year," she says.
The CEO also makes a bolder promise: whereas it took Arm about 20 years to get where it is today, she predicts it will take RISC-V roughly five years to make the same amount of progress. "Where are we in the adoption curve? We're not halfway yet, but we are getting there very quickly," she says.
The caveat, she adds, is that the five-year timeline is an "imprecise measurement," as RISC-V International and its members need to fill out some additional capabilities on the instruction set side as well as software support to cover a broad spectrum of applications.
But what makes Redmond confident in RISC-V's ability to gain more traction over the next few years is the growing support the ISA has received from a plurality of organizations.
"The reason that we're getting there faster is that we have a greater shared pool of investment across the community that is driving that," she says. ®


Patrick Little, CEO of RISC-V designer SiFive, told us in March he doesn't expect to see commercial processors using the company's designs in PCs until late 2025, and server efforts will take longer than that.
 
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Perhaps

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True but SiFive could be a giant and rising together isn't a problem and makes communicating to the market more powerful. Also the quicker we leave the ASX the better. Intel is getting as close as they can to SiFive since their t/o offer rejected and each day that goes by the takeover price rises as the reality of RISC-V processors becomes understood.
Whoever can't wait to enter the Nasdaq, it's not me. Compared to the Nasdaq the ASX manipulations are just sandbox games. In care for my nerves as a shareholder I feel much more comfortable staying at ASX as long as possible.
 
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By 2023, you're likely to see the first mobile phone with RISC-V," SiFive Chief Executive Patrick Little said in an October interview. "I think we have an excellent shot at the phone.

 
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Thanks @White Horse for posting


Accelerated Performance with SiFive RISC-V​

May 24, 2022
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by Sulagna Saha
All the innovation that’s been going on around compute from edge to cloud has been so far for the purpose of developing processors with more and more horsepower. Several years back SiFive Inc. entered this conversation with RISC-V, an emerging alternative processor architecture and is now leading in it with a potential alternative for ARM system IP. In a briefing with Phil Dworsky who is the Global Head of SiFive’s Strategic Alliance, we talked about RISC-V and how SiFive is planning to shape the future of compute with it.

An Introduction to RISC-V​

A relatively young technology, RISC-V (pronounced risk-five) is an open-source instruction set architecture (ISA) built for RISC chips. The biggest differentiator of RISC-V is that it does not require a licensing fee which is standard with most ISAs. In its case, the ISA is maintained by RISC-V International that is a non-profit outfit.
Used commonly in microcontrollers and chips, RISC-V has been a widely adopted technology in the past few years with the likes of WD using RISC-V controllers in large scale for their products. RISC is short for Reduced Instruction Set Computer, the principles on which RISC-V is based. Using a load-store architecture, RISC-V works in a wide range of applications, from embedded systems to high-computing servers with vector processors in data centers.

SiFive, from the Pioneers of RISC-V​

SiFive, a chip designer company in the US is led by the very same people who founded RISC-V International that is headquartered in Switzerland. Now a very familiar name in the ISA space, it is an independent outfit that has collaborations with multiple industry leaders, including hundreds of design wins at 8 out of the top 10 semiconductor companies. Only six years old, SiFive is already valued at $2.5 billion. In March, the startup raised a whopping $175 million in Series F funding which shot its net worth up from $500 mil in 2021 to 2.5 billion in 2022.
One of its newest collaborations is with Intel whose foundry services (IFS) it will be collaborating with, SiFive announced in 2021. In addition to this, it has entered into partnership with companies like BrainChip and Renesas for joint development of technologies and solutions in edge AI. Deep Vision and Tenstorrent are two of the most prominent names that have adopted SiFive RISC-V, integrating it into their technologies for performance boost.
Now targeting a 2x headcount in a short span of just 18 months, the company is all set to trigger hypergrowth by hiring in large numbers. One of SiFive’s key members on board is Rohit Kumar, who formerly led the engineering team at Apple and is known for the shining success of Apple M1.

A Closer Look at SiFive’s Portfolio of Processors​

SiFive-HiFive-Unmatched-Board.jpg

In June, SiFive Performance debuted with two core, P270 and P550, the first Linux capable and the then highest performing processor in their portfolio, respectively. This was followed up by the significantly higher performing P650. According to SiFive, this new member in the Performance family is “expected to be the fastest licensable RISC-V processor IP core in the market” and has over-the-top performance per milliwatt. Building on the performance of the first two, the P650 delivers significantly more performance per cycle and targets bigger market segments like automotive, edge and data centers.
SiFive Intelligence, a software + hardware solution, is more focused on AI. A high-performance scalable AI processor with extensions and AI focused capabilities, the Intelligence is built for Edge AI, Cloud, ML inferencing and such high compute works that require parallel performance and efficiency.

In Conclusion​

Overall, SiFive’s CPU and AI cores powered with RISC-V are a great investment choice simply because they cater to all classes of performance and efficiency. Both pre-configured to serve common use cases and flexibly configurable for specific ones, the SiFive’s line of high-end cores bring to the consumers, formerly underserved, a rich variety of choices in high-performance processor IPs. Thanks to Phil Dworsky for the briefing and Emilie Kemp for setting it up.
Check out SiFive’s full portfolio on their website. Keep reading more exclusives like this at gestaltit.com.
 
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Ahboy

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Not sure if it has been posted, below is the Spotlight Session by Patrick Little, CEO & Chairman, @SiFive TOPIC: "The Future of RISC-V " on Day 2 of @SixFiveSummit. Published on 07/06/2022. I have also attached the transcript. Some interesting comments regards commercial traction as highlighted in the transcript.


0:11 Hello, and welcome back to "The Six Five Summit".
0:13 I'm Shelly Kramer, one of the founding partners
0:15 and a principal analyst here, at Futurum Research,
0:17 and on behalf of my team at Futurum
0:19 and the team at Moor Insights & Strategy, welcome.
0:21 We're glad to have you.
0:23 In this spotlight session, Futurum's Daniel Newman sits down
0:26 with SiFive CEO and Chairman, Patrick Little,
0:29 for a conversation about all the buzz surrounding RISC-V,
0:33 and what the future holds for this exciting technology.
0:36 Let's dive in.
0:37 We want to thank Accenture
0:39 for sponsoring the Semiconductor Track
0:42 of this year's Six Five Summit.
0:53 Patrick Little, CEO, SiFive,
0:57 welcome to the 2022 Six Five Summit.
1:00 So excited to have you here.
1:02 Yeah, really excited to be here, Daniel.
1:03 Looking forward to it. Yeah, it's great
1:06 to have the opportunity to, you know, sit down,
1:09 have a conversation.
1:11 So much going on in the semiconductor space.
1:13 It's a really interesting time in the market
1:16 and the economy.
1:17 So, I'm gonna pick your brain about a lot of things.
1:18 Hopefully, everyone out there in the audience can walk away
1:23 knowing a little bit more about SiFive,
1:25 a little bit more about RISC-V,
1:26 and maybe even learn a little bit more
1:28 about what's going on in the world of technology
1:30 and how semiconductors are continuing to change the world,
1:34 or as I like to say, eat the world.
1:36 That type of things, right? Absolutely.
1:39 So, let's start with RISC-V.
1:43 Hearing a lot of buzz about it.
1:44 We've been covering it, talking about it,
1:47 but it's not necessarily household name yet.
1:51 So for those in the audience that are, you know,
1:55 hearing about RISC-V, or maybe you've heard about it
1:57 but don't really know much about it,
1:59 how do you explain, define, introduce RISC-V
2:02 to that audience?
2:03 Yeah, I only do this like 20 times a day.
2:05 So, happy to kind of, lay the foundation.
2:08 At first, I have to giggle what you said
2:10 about the changes in tech.
2:11 You know, 10 years ago, if you would've mention hardware,
2:14 there'd be a mad rush for the door,
2:16 and now it seems like hardware's really kind of,
2:17 having a renaissance,
2:19 and this computing supercycle is just profoundly strong.
2:22 It'll outlive all of us, but RISC-V.
2:25 So, let me take you back, I don't know,
2:28 when Dave Patterson first started,
2:30 even coined the term RISC,
2:32 and really started working
2:33 on reduced instruction set computer's architectures
2:38 at Berkeley.
2:39 In fact, when I was going through college,
2:40 I used Dave's textbooks.
2:43 And so, I kind of view him
2:44 is the father of the entire thing,
2:49 the entire RISC architecture.
2:51 But then you kind of fast forward to about 2010
2:54 and we have Krste Asanović, who's a professor at Berkeley,
2:58 who has a research program and he needs to solve...
3:01 You know, he's looking
3:02 for a new instruction set architecture
3:04 that gives him and his team the ability
3:07 to collaborate across projects,
3:09 to collaborate even across universities,
3:12 but something that is clean slate, modern, scalable,
3:16 and he couldn't find anything out there.
3:18 And it was not only the commercial pieces
3:20 of not being able to access the technology free
3:22 and openly and collaborate openly,
3:24 but it was also just the tech itself.
3:27 He wanted something small.
3:28 He and his team wanted something small and very modular,
3:31 but also scalable through extensions.
3:33 And so, they sat down for a brief summer session
3:37 to try to really design something
3:39 and they came out with the RISC-V architecture,
3:42 which I will tell you, is gonna have profound repercussions
3:45 across this industry for not five years or 10 years,
3:49 but 50 years.
3:50 And so, the idea behind it was,
3:53 let's design something that is open for collaboration
3:56 across academia, not just at Berkeley,
3:58 but across all of academia initially,
4:00 but something where anyone can pick it up
4:03 without an upfront fee, without the encumbrances up front,
4:06 and work with it and scale it
4:08 and devise their own computing architecture
4:11 around the RISC-V core.
4:12 And that was kind of the essence of it,
4:14 but really, at the very heart of it, collaboration.
4:17 And so they were quite successful in doing that.
4:19 And some five years later,
4:21 it started to go into not only other universities,
4:24 but other countries, very quickly spanned into India
4:27 and China and Europe and many other territories.
4:30 And so, that what he found is that by 2015,
4:33 the entire architecture was put into something
4:36 called the RISC-V Foundation
4:38 to ensure that it remained open and accessible
4:41 to really everyone.
4:42 And so, all of that IPL that was generated
4:44 at Berkeley and beyond was donated to the RISC-V Foundation,
4:48 which now has become RISC-V International.
4:51 And another thing occurred kind of,
4:53 coincident to that in 2015 is
4:55 that team from Berkeley went often started a new company
4:58 because they saw the commercial aspects of the technology,
5:02 really with the same fundamental principles in mind,
5:05 collaboration across partnerships,
5:07 collaboration across a community of participants,
5:11 and also collaboration with customers.
5:13 And so, that was kind of,
5:15 the nucleus in the starting of SiFive back in 2015.
5:19 But I think it began with David Patterson in 1980,
5:23 and it just progressively RISC-I,
5:25 all the way through RISC-V, gotten stronger and stronger.
5:29 And I think, it sets a brand new model in computing
5:33 where things are open and available,
5:35 and it just makes it a lot easier for smaller companies
5:37 or universities, or now very large companies
5:40 to innovate around the computer architecture.
5:43 So I think it's a, not only a new architecture,
5:46 and there have been many,
5:47 but I think it's a new model for collaboration
5:50 on computing platforms.
5:52 Most of the computing platforms
5:54 or the instruction set architectures that have been here
5:57 through history have been but from a single company,
6:00 and so most the failures of those have been
6:03 that sponsor company failing financially.
6:06 And so, I think, what a lot of our customers see is
6:08 since the community now owns this,
6:10 literally thousands of companies, universities,
6:14 software companies, you name the type of tech company,
6:17 are collaborating, it's protected.
6:20 And I wanna say, recently we closed a very large design win
6:24 with a very well known space and aeronautical company,
6:29 and one of their primary reasons
6:30 for choosing it is they felt that this is a standard
6:33 that's gonna last for decades and decades into the future,
6:36 and that the software they write today will be scalable
6:39 into the future, and this platform will continue
6:41 to have strength and existence over the coming decades.
6:44 And so, that's what started in Berkeley some decades ago
6:47 and primarily 12 years ago for RISC-V,
6:50 and incredible legs on it.
6:52 Frankly, I'm very proud to be part of it
6:54 because it's something that's going to be going on.
6:56 My children will be learning RISC-V in college,
6:59 like many do, and so it's great to be part of something
7:02 that's gonna outlive all of us.
7:04 But that's kind of the nucleus and the intent
7:05 behind the RISC-V architecture.
7:08 Absolutely, and you touched on a lot of things there,
7:10 and I'm gonna want dig in a little bit more
7:11 into some of the, you know, differentiations
7:14 and the verticals in which you're serving.
7:16 We'll hit that in a minute.
7:16 But SiFive, so one of the well known participants,
7:23 you know, in the RISC-V arena
7:26 but you started to kind of allude a little bit to the,
7:29 you know, the finding of the company
7:31 and what was the basis of SiFive.
7:34 But give us just a little more on that
7:36 because, you know, I'm interested.
7:38 You know, talk about the mission of the company.
7:41 You mentioned all these different participants.
7:44 What's the SiFive story?
7:46 What is your role to play?
7:4 Yeah, great question, Dan.
7:49 So, I think first and foremost,
7:51 our role, I believe, is the brand standard.
7:54 So, the same team that founded RISC-V
7:56 at Berkeley is the team that founded SiFive, as I mentioned.
7:59 And so we feel a responsibility
8:01 to keep the virtuous essence of the architecture around,
8:06 for the collaboration, for the scalability,
8:09 and to try to protect and grow it.
8:11 And not only as SiFive, but also as a community member
8:14 in the RISC-V Foundation.
8:16 So first and foremost, we feel kind of responsibility
8:19 to extend the seed that began at Berkeley some 12 years ago.
8:24 And then the rest of our mission today,
8:26 it's gonna sound a little corny,
8:28 but our mission today is all wrapped
8:29 around the success of our customers.
8:31 When we talk about success,
8:32 we don't talk about a design win or a product release,
8:35 we talk about what can we do to perpetuate the success
8:39 of our customers to deliver best in class products
8:43 in their end markets.
8:44 And so, that's what we're focused on.
8:45 We're very right to left.
8:47 If you walk the halls of SiFive,
8:48 you'll hear the term "right to left" an awful lot.
8:51 And so, we believe that if our customers...
8:54 We want RISC-V and SiFive to do amazing things this year
8:58 and over the decades.
8:59 To do that, we really need to empower our customers success.
9:02 So we focus on that.
9:04 Their success always translate,
9:06 the transitivity from their success to our success,
9:08 and frankly, down to the success of RISC-V is highly linear.
9:13 And so, that's what we do is we focus on collaborating
9:16 with partners, working with them to drive their innovations,
9:19 frankly, in almost any market and application you can name,
9:23 and drive that innovation all the way through SiFive
9:26 and back into the standard.
9:27 And I think, this is one of the reasons
9:29 why the standard will last for many decades.
9:32 The architecture was well defined in the RISC-V standard,
9:37 but not the implementation,
9:38 and so, the micro architecture
9:39 or the implementation of the standard is
9:42 left open intentionally for interpretation.
9:45 And so, one of the things we do at SiFive is we interpret
9:48 that in a way that benefits our customers.
9:51 And so, one of the areas
9:53 that I think, that we're very unique
9:55 and the RISC-V standard is very unique is
9:57 that we always knew that it was gonna be clean.
10:00 We always knew that it was gonna be modular and scalable
10:03 and therefore, tight and efficient.
10:05 But one of the things we're really finding out...
10:07 You mentioned, how we differentiate ourselves.
10:10 One of the things that we're finding out now
10:12 that we're actually taking this
10:13 into real world applications is
10:15 that our performance per watt is profoundly better
10:18 than anything out there,
10:20 and it has to do with the focus from the very beginning
10:22 and the cleanliness of the architecture.
10:24 And so, we have,...
10:26 And, I mean anything from Edge AI
10:28 all the way to the cloud implementations,
10:30 our customers are coming back to us saying,
10:32 "I don't know if you guys really know this,
10:34 in the lab and in our products, we're starting
10:36 to see some outrageous performance per watt advantage."
10:40 And at the Edge, it's very obvious
10:42 that customers would need that power efficiency,
10:46 but now, Daniel, when you talk to any customer
10:48 in any vertical, any application,
10:50 they're trying to get the maximum performance they can
10:53 in a power envelope, very obvious in mobile,
10:56 first order obvious in mobile,
10:57 but same thing for automotive
10:59 and same thing for the data center
11:00 and many, many other applications.D
11:02 So, in addition to the openness of the architecture,
11:05 which we believe is foundationally unique for this ISA,
11:10 we believe that on its own right,
11:12 technically speaking, it's super low power,
11:15 super area efficient.
11:17 And then I now think, another thing that's very important is
11:19 it's highly scalable from the smallest micro controller
11:23 to the largest, very parallel processing monster
11:26 that we design and one set of software works across
11:31 that entire continuum.
11:32 So, one set of software binaries can work
11:35 on any RISC-V machine that's compatible,
11:38 and that's whether it's from SiFive or another vendor.
11:40 And so, these are some of the attributes that I think,
11:43 do differentiate SiFive, and we do view ourselves
11:46 as the brand standard and the founder of RISC-V,
11:48 but we also think that the value that this ISAs bring
11:52 to our customers is profoundly different
11:55 and differentiated and very powerful,
11:57 and this is why I think we'll be around for decades to come.
12:01 And then I should say something about the culture,
12:02 it's wacky, super...
12:04 A lot of Birkenstocks, as you might guess,
12:07 but great group of people, incredibly humble,
12:11 incredibly focused on not this year or this quarter,
12:15 but on really bringing this ISA and changing the industry,
12:19 and driving low power and collaboration.
12:22 You know, community collaboration is top of mind for us.
12:24 Every time we think about something for our company,
12:26 we think about, well, how can we also move the community?
12:30 So it's wonderful mission that we're on.D
12:32 And that's why, you see, we're starting
12:34 to really build our engineering team super quickly,
12:37 and we're getting a lot of very excited candidates knocking
12:40 on that virtual front door.
12:41 So, Patrick, I think you can read my mind a little bit,
12:43 'cause I was gonna hit you up.
12:44 I was gonna say, "Hey, talk a little bit
12:45 about the differentiation", but you kind of nailed it,
12:48 talking about, you know, everything from low power
12:50 to open and, you know, you mentioned several other.
12:54 So, I'm gonna kind of jump ahead a little bit,
12:56 'cause I'm gonna talk a little bit
12:57 about the traction in the market,
12:59 because I think that's a lot of time
13:00 the rubber meets the road, proverbially speaking.
13:05 Right. Right?
13:05 When customers start to utilize and buy.
13:07 Now again, you go from...
13:09 You mentioned Berkeley and you mentioned Birkenstocks.
13:12 I did often wonder if there was any relationship.
13:14 I don't think there, there actually is,
13:16 but if you walk around Berkeley,
13:18 you'll also see a lot of Birkenstocks, so.
13:20 By the way, that was just a little interruptive humor
13:23 to the interview,
13:24 (Patrick chuckles)
13:25 if anybody out there just need to take a break
13:26 from all this technical content.
13:29 I'll throw that one to the team
13:30 and we'll see what they come back with,
13:32 but, I think, with that correlation.
13:34 Yeah, throw that out there, let me know,
13:36 where were Birkenstock invented?
13:38 Maybe that'll be the title of this session.
13:40 No, let's keep focus.
13:42 Patrick, don't let me go too far off.
13:46 You did mention when we talked a bunch of applications
13:48 though, you talked about the edge a few times,
13:50 you talked about the data center.
13:53 So these are, you know, Edge, data center, AI, automotive,
13:56 these are a number of the areas
13:58 where these new architectures are being looked at,
14:01 new competition entering markets.
14:03 You're seeing hyperscalers are building home grown.
14:05 You guys are obviously identifying opportunities
14:10 in a big market and a big market opportunity.
14:13 Where are you seeing SiFive
14:15 and RISC-V gain commercial traction?

14:19 Right, great question.
14:20 So, the company actually had two phases.
14:23 The first phase was to prove out the architecture,
14:26 build the brand and we did that
14:28 through a series of very scalable embedded products
14:33 in very established markets.
14:34 And so, we did that for the first four to five years
14:38 of the company.
14:38 We offered the very smallest course
14:40 and the very largest embedded course,
14:42 but because we focused on embedded
14:44 our application applicability was extremely broad.
14:47 We were in 5G infrastructure.
14:49 We were in mobile handsets.
14:51 We were in wifi gear.
14:54 We were in networking.
14:56 If you name it, we were in those applications,
14:59 over hundred customers,
15:00 hundreds of different design wins and applications.
15:03 And so, the early adoption
15:05 of the company's tech was very, very broad,
15:08 and frankly, really enabled the company
15:11 to make a name for itself
15:12 and prove that we could deliver the quality
15:14 at a commercial and enterprise level.
15:16 And so, we proved ourselves in those early days.
15:19 Since coming on board, about two years ago,
15:22 we pivoted to higher performance applications.
15:26 And so, our objective is,
15:28 if you can get it from any other vendor
15:29 at any level of performance,
15:31 you'll be able to get that same thing from SiFive.
15:34 We're probably about a year and a half away
15:35 from that intercept point
15:37 where you can look across all of the existing ISAs
15:40 and say, SiFive has best in class raw performance
15:43 in every category.
15:45 But what we look at now is the applications
15:48 that we're servicing now are still quite broad
15:51 because the nature of the ISA.
15:52 We are in quite a few of the Edge AI solutions
15:56 with our vector products.
15:58 For example, we have one customer
16:00 who is building security cameras,
16:04 and it is originally an embedded device that was IoT,
16:07 so it was connected, but it kept sending you notifications
16:10 to your phone when the trees blew.
16:11 And so what they wanted,
16:12 and this is a very well known company in high volume,
16:15 what they wanted was some intelligence at the Edge,
16:18 so where you don't get a notification at work
16:20 when trees are blowing,
16:21 but only when someone with a black mask is
16:23 at your front gate.
16:24 And so, that's one example of something very small
16:27 that's battery powered that we're servicing

16:30 with our new products.
16:32 Another example was we also have
16:34 a brand new data center customer
16:36 who's developing multi-core, multi-cluster,
16:39 extremely wide compute solutions,
16:43 and we're sitting alongside in cooperation
16:46 with their computing pieces.
16:48 And so, you really do see this very broad applicability
16:51 of the RISC-V or the SiFive architecture.
16:55 And so, we're enjoying all of the applicability
16:57 across the board.
16:59 We do have some areas of focus,
17:00 I think, in the immediate term
17:01 that make a me lot of sense for us
17:03 because we feel like they're underserved markets
17:06 in very exciting applications.
17:08 One of them in particular is automotive.
17:11 I'm from automotive,
17:12 I recently left Qualcomm where I ran automotive
17:15 to come here, and so those applications,
17:18 those customers, that industry is close to my heart.
17:21 And so, there's a lot of intelligence going
17:24 into those designs, there's a lot of compute going
17:26 into the car where there wasn't so much even 10 years ago.
17:29 And so, we're partnering quite publicly
17:32 with quite a few of the automotive customers.
17:34 We feel like we're a great fit.
17:35 They love our outright performance.
17:37 They love the openness of the architecture.
17:41 So that's one category.
17:43 Another category where I feel like
17:44 we're really getting a sharp rising Edge on the uptake is
17:48 around vectors, and so, those customers that wanna add AI
17:52 to their existing solutions,
17:54 and so, a lot of them will need vector processing
17:57 alongside of their kind of, traditional scaler processing.
18:00 And so, what we're finding is many customers don't want
18:03 to be captive to an existing proprietary solution
18:07 in a new category.
18:08 So, if they're moving to a new category,
18:09 they're thinking, "Everything's wide open.
18:12 The software's not really established yet.
18:14 The ecosystem's not really established yet.
18:16 Let's go with an architecture that will take us 20 years
18:19 in the future where we won't be captive,
18:21 where we'll be open to innovate with a partner,
18:24 without a partner."
18:27 And I think Intel is a perfect example
18:29 of leadership and maturity.
18:32 They are a partner of ours.
18:33 They're a customer of ours.
18:35 Many people might look at that and say,
18:36 "Why wouldn't you be natural competitors?",
18:38 but the truth is they're one of our best customers
18:40 and one of our best collaborators,
18:42 because they look at the x86 architecture,
18:44 then they look at the RISC-V architecture with SiFive,
18:47 and they see an ability to achieve different things
18:50 at different design points.
18:51 And so, they're an investor in our company.
18:54 They recently joined RISC-V International,
18:57 which I feel is a historic moment
18:59 that was overlooked by a lot of people.
19:02 Everyone should have turned their head and said,
19:03 "Wow, the maturity there is pretty phenomenal."
19:07 And I think that Intel's joining RISC-V International is
19:10 really a tipping point for the entire foundation
19:13 and entire ecosystem, because they're doing so much,
19:16 they're bringing so much tech in cooperation with us
19:19 and the rest of the foundation.
19:20 It's pretty amazing what's happened there
19:23 And I think that we'll end up doing some phenomenal designs,
19:25 you know, hybrid designs with them.
19:28 Yeah, it's a little bit of a sneak peek into the future.
19:30 And, you know, we have a minute or two left
19:32 in this conversation, Patrick,
19:34 and I, you know, wanna thank you
19:36 because it's been great insights.
19:37 I think anyone out there that didn't know about RISC-V
19:40 or wasn't overly familiar, has to know quite a bit more now.
19:44 So that's 20 minutes well spent.
19:45 As I like to say, it's a Ted talk for RISC-V.
19:49 But you say something,
19:50 or I've heard you say something in the past
19:53 along the lines of "RISC-V has no limits".
19:57 Bold, it's a bold statement.
19:59 I mean, do you believe that?
20:00 What do you mean by that?
20:02 And you know, what does that mean
20:03 for the future of SiFive and RISC-V?
20:07 Yeah, the reason why I say that is,
20:10 first and foremost, we're living
20:12 in the computing supercycle.
20:13 So, I mean, just timing is everything.
20:16 We're so lucky with our backgrounds
20:19 to work into an envelope in time
20:22 where computing is so profoundly important to the world,
20:25 and this is from medical to communications to data center,
20:29 so important to the world.
20:30 And so, when I look with objective eyes
20:34 at the RISC-V architecture and the difference it can make
20:37 in the trends that are going on in the world,
20:39 I see such a incredibly good match.
20:43 And then when I layer on top of it,
20:44 kind of, back to the virtue of
20:46 why this thing was even started in the first place,
20:49 let's make it open, let's make it clean,
20:51 let's make it scalable, and most importantly,
20:54 let's make it collaborative where the best idea wins,
20:58 whether it's Intel's or ours
21:00 or somebody else on the RISC- V,

21:01 or even a competitor's idea if they put it
21:04 to the RISC- V International pot of ideas.
21:07 I just think that it's the computing supercycle
21:11 really taking this world to a whole new level,
21:14 and RISC-V kind of, coming off the on ramp
21:16 in the perfect time to be able to deliver a lot
21:20 of the attributes that are necessary.
21:22 And so, we're seeing it live.
21:24 It's incredibly exciting at the company.
21:26 We're in handsets, we're in 5G infrastructure,
21:29 we're in art, we're in cars, we're going into data centers,
21:32 we'll soon be in client computing.
21:34 We have not seen anything about the architecture
21:36 that would limit it from servicing with very high impact
21:40 into almost any application.
21:42 And so, it's super excited about...
21:44 I'm personally excited about being part of SiFive
21:46 and incredibly excited about just being part
21:48 of the RISC-V movement.
21:50 It will make a difference in this industry
21:53 that's gonna outlast both of us,
21:55 and we'll be standing on the hill next to our customers
21:57 and next to our partners, and next to academia,
21:59 'cause we'll all be collaborating.
22:02 Super exciting times.
22:04 Well, you totally spoiled my self belief
22:06 that I'm gonna live forever there,
22:07 now that I know this is gonna outlast me.
22:10 But in all serious, if you've been out there,
22:13 you can read some of the analysis that I've written
22:15 after some of the recent moves
22:17 that you've made, Patrick, as CEO of SiFive,
22:20 and I definitely see a lot of potential.
22:23 We are definitely in that supercycle,
22:25 as I often say and continue to say,
22:28 that semiconductors will change and eat the world
22:31 because you can't run all this software on nothing.
22:33 It can't run on air.
22:35 It's gotta be built on a world of chips,
22:38 and if the shortages that we faced
22:40 during this pandemic didn't make people just acutely aware
22:44 of how important semiconductors are,
22:46 then I don't know what would.
22:47 But Patrick Little, SiFive, congratulations.
22:51 Thank you so much for joining me
22:53 at this year's Six Five Summit.
22:55 We can't wait to hear more,
22:56 to watch and see how SiFive and RISC-V continue
23:00 to change all of the areas in which you're participating.
23:04 So we'll see soon, Patrick. Thanks, Dan.
23:06 Exciting times ahead and future is bright.
23:08 Appreciate it. Enjoyed it.
 
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