Will GenAI kill the analog SNN?
Just revisited the Roadmap video.
At 22:30 in his roadmap video Jonathan Tapson mentioned in an aside that BRN has some pending patents for reducing data movement from memory.
https://brainchip.com/brainchip-technology-roadmap/
Analog SNNs greatest advantage is in-memory compute, ie, the MAC calculation hardware includes the memory transistor cells (ReRAM/MemRistors/etc.).
Tapson mentions that most of the energy is used in moving the data around. GenAI now includes an arrangement (some more secret sauce until the patent docs are published) which either reduces or eliminates this advantage. Given analog's various frailties, this will make Akida 3/GenAI even more attractive compared with analog alternatives.
Some competitors, such as Qualcomm have opted for a hybrid analog/digital arrangement, so if they have put all their eggs in that basket, there's room for others to trump their tech by adopting Akida 3/GenAI.
I think another major takeaway from the roadmap is the adoption of INT16 and FP32. As Tapson explains, this means that any available model is now a "drop-in" match for the coming Akida architectures. [Aside: my guess is that analog would struggle with anything greater than 4 bits].
Instruction-based architecture is yet another major advance. This increases the versatility of future Akida processors.
GenAI is already in FPGA. Sean has commanded the production of a silicon version within a year.