This popped up from ARM tweet:
bit.ly/3Z8asbO
A rich vein of gold:
https://interactive.arm.com/story/neoverse_the_next_wave/page/3/1
Neoverse-E1
https://www.arm.com/products/silicon-ip-cpu/neoverse/neoverse-e1
Neoverse E1 is a flexible platform which supports scalability from 25Gbps in 4W CPU power budget to multi-100Gbps systems. Accelerator Coherency Port (ACP) enables closely coupled fixed-function hardware offload support with low latency and cache stashing capability.
We have seen the term "closely coupled" used in relation to ARM M85 and Akida.
Highly scalable throughput for edge to core data transport Arm Neoverse E1 is ideally suited for data plane compute workloads such as 4G/5G transport, software defined networking, software defined storage, and SD-WAN. This innovative platform features a scalable architecture suitable for 10Gb wireless/wireline devices to high-performance 100G+ Dataplane Processing Unit (DPU).
Flexible architecture enables fixed-function accelerator integration via low-latency Accelerator Coherency Port
High efficiency design supporting 25Gbps+ throughput in less than 4W power budget
Common Armv8.2-A architecture enables integration with Neoverse N1 platform for high-performance, multi-port 100Gbps networking devices
Specifications and Features
Simultaneous Multithreading (SMT) supporting two threads concurrently Up to 8 cores (16 threads) per cluster Superscalar, out-of-order pipeline
Configurable private L2 cache
Configurable L3 cache
Low-latency Accelerator Coherency Port (ACP) for closely coupled accelerator integration
Support cache stashing into L2/L3 cache
Akida is compatible across the range of ARM processors.
bit.ly/3Z8asbO
A rich vein of gold:
https://interactive.arm.com/story/neoverse_the_next_wave/page/3/1
Neoverse-E1
https://www.arm.com/products/silicon-ip-cpu/neoverse/neoverse-e1
Neoverse E1 is a flexible platform which supports scalability from 25Gbps in 4W CPU power budget to multi-100Gbps systems. Accelerator Coherency Port (ACP) enables closely coupled fixed-function hardware offload support with low latency and cache stashing capability.
We have seen the term "closely coupled" used in relation to ARM M85 and Akida.
Highly scalable throughput for edge to core data transport Arm Neoverse E1 is ideally suited for data plane compute workloads such as 4G/5G transport, software defined networking, software defined storage, and SD-WAN. This innovative platform features a scalable architecture suitable for 10Gb wireless/wireline devices to high-performance 100G+ Dataplane Processing Unit (DPU).
Flexible architecture enables fixed-function accelerator integration via low-latency Accelerator Coherency Port
High efficiency design supporting 25Gbps+ throughput in less than 4W power budget
Common Armv8.2-A architecture enables integration with Neoverse N1 platform for high-performance, multi-port 100Gbps networking devices
Specifications and Features
Simultaneous Multithreading (SMT) supporting two threads concurrently Up to 8 cores (16 threads) per cluster Superscalar, out-of-order pipeline
Configurable private L2 cache
Configurable L3 cache
Low-latency Accelerator Coherency Port (ACP) for closely coupled accelerator integration
Support cache stashing into L2/L3 cache
Akida is compatible across the range of ARM processors.
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