Just noticed something I didn’t actually realise until today.
In October Andes and Quintauris announced a strategic partnership to unlock mass-market adoption of RISC-V in domains like automotive, industrial, and edge computing.
Quintauris’ automotive real-time reference architecture is integrating the 32-bit ISO 26262 certified AndesCore CPU and the collaboration is expected to span across the rest of the AndesCore processor series.
They’re talking about an automotive-grade RISC-V architecture stack that is intended to propagate across multiple Andes cores and multiple safety profiles.
There's a pretty good chance that this would be directly relevant to BrainChip IMO.
Back in April 2025, BrainChip and Andes had Akida running on the QiLai Voyager board with the AX45MP 64-bit multicore. So, Akida has effectively already been proven operational next to an Andes host. The automotive world is now actively validating Andes’ safety-enabled cores for real time architectures
So if Andes’ CPU family becomes the safety-certified host platform for new RISC-V automotive ECU's, then BrainChip would already have the co-processing integration in place to position Akida as an ultra-low-power neuromorphic edge block, sitting beside a safety-qualified RISC-V host for automotive domain controllers, DMS modules and sensor pre-processing ECUs.
Obviously this is not guaranteed, but I'd have thought that this would be the kind of foundation we'd need to for Akida to become widely deployable in automotive.
Oh, and if you check out the Linkedin post below, you'll see that Quintauris is backed by Bosch, Infineon, NXP and Qualcomm.
IMO. DYOR.
Andes + Quintauris announcement, October 2025.
From our technology partner's page.