BRN Discussion Ongoing

I wonder if was Sean/Brainchip that reached out to SDU for an interview so they can update the market, without actual updating on the market,
At the 1.20 mark he mentioned his thoughts for this year is still in the cards.
I think you are correct, he is telling us something positive here imo .
Early Christmas present , fingers crossed.
 
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Esq.111

Fascinatingly Intuitive.
Afternoon Chippers ,

Around this time yesterday we saw a little step up in price & volume , looking at the trading string presently seeing a lot of Bull $hite trades .

Oh , & yesterday some tosser took out 5 mill share short , good luck with that .

Regards,
Esq.
 
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7für7

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Afternoon Chippers ,

Around this time yesterday we saw a little step up in price & volume , looking at the trading string presently seeing a lot of Bull $hite trades .

Oh , & yesterday some tosser took out 5 mill share short , good luck with that .

Regards,
Esq.
Personally, I unfortunately don’t have access to current charts or buy and short data. It’s always helpful when people like you share the current situation. Sometimes, it’s hard to understand the price movements without having the data… Thanks for that.
 
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FiveBucks

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At the 1.20 mark he mentioned his thoughts for this year is still in the cards.
I think you are correct, he is telling us something positive here imo .
Early Christmas present , fingers crossed.

2025 now...

What happened to deals by the end of 2024?

:cautious:
At the 1.20 mark he mentioned his thoughts for this year is still in the cards.
I think you are correct, he is telling us something positive here imo .
Early Christmas present , fingers crossed.
Looking like the market didn;t like it. 2024 just became 2025.

Groundhog day....
 
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7für7

Top 20
2025 now...

What happened to deals by the end of 2024?

:cautious:

Looking like the market didn;t like it. 2024 just became 2025.

Groundhog day....
Don’t think so
It’s not the market that doesn’t like the situation, but people who sell off every penny out of greed. Day traders and short sellers have the say until fundamental facts emerge. The top 20 are my guide, and not the opinion of an anonymous person in a forum like this… at least not when it comes to my investment horizon. Sometimes I wonder how people can stretch their emotions so much every day… truly incomprehensible.
 
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FiveBucks ..,Listen again at 1.20 mark
 
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A month old but some positive vibes still popping up in various places.





Sheikh Jasim Uddin

Owner @ AKIJ Resource | Entrepreneurship| People's Champion| Towards Limitless| Digital Consultant
1mo

𝐓𝐡𝐞 𝐀𝐈 𝐑𝐞𝐯𝐨𝐥𝐮𝐭𝐢𝐨𝐧 𝐘𝐨𝐮 𝐃𝐢𝐝𝐧’𝐭 𝐒𝐞𝐞 𝐂𝐨𝐦𝐢𝐧𝐠: 𝐌𝐞𝐞𝐭 𝐁𝐫𝐚𝐢𝐧𝐂𝐡𝐢𝐩’𝐬 𝐀𝐤𝐢𝐝𝐚 – 𝐂𝐡𝐚𝐧𝐠𝐢𝐧𝐠 𝐄𝐯𝐞𝐫𝐲𝐭𝐡𝐢𝐧𝐠 𝐟𝐨𝐫 𝐄𝐝𝐠𝐞 𝐂𝐨𝐦𝐩𝐮𝐭𝐢𝐧𝐠 Forget everything you know about AI! BrainChip’s Akida Generations is here, and it’s flipping the script on edge computing. This is NOT your typical AI solution—Akida is setting a new standard for real-time, energy-efficient intelligence right where it matters: at the edge. 💡 Why is Akida a Game Changer? ⚡ Unbelievably Efficient: Say goodbye to energy-hungry AI systems. Akida uses brain-inspired technology that slashes power consumption like never before! 🧠 Real-Time Learning: No more waiting for endless retraining. Akida learns on-the-fly, in real-time, allowing your systems to adapt instantly. 🚀 Faster, Smarter, and Scalable: Whether it’s smart cities, autonomous vehicles, or next-gen healthcare, Akida scales AI power to any edge device without missing a beat. #AI #EdgeAI #NeuromorphicComputing #BrainChip #Akida #DisruptiveTech #FutureOfAI #DigitalTransformation
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John Weaver
Delivery Head | Project Management Specialist | Agile
1mo

BrainChip’s Akida sounds wild. Real-time learning and efficiency might just change the whole game for AI tech. What do you think?
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Sharif Jikrul Abadeen Pantho
Digital Marketing II Marketing manager ll Sr. Expert, Marketing & Branding ll Butterfly Group II Ex Speeadaf ll Ex ShopUp
1mo

Saw the demonstration. It's really cool and very useful for any industry specially high power consumption industry. Realtime will be helpful for designing a better growth plan. Did you see the new meta glass?
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Md.Sajjad Hossain
BBA & MBA, Accounting & Information Systems, Jagannath University.
1mo

Sir Thank You.
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Md.Sajjad Hossain
BBA & MBA, Accounting & Information Systems, Jagannath University.
1mo

This is great
 
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From a recent blurb on CES website for CES 2025.


Innovating Energy: How Technology is Shaping Our Power Systems​

October 30, 2024

Excerpt.

Estimates show that data center electricity consumption for the U.S. alone could reach nearly 260 terawatt-hours (TWh) by 2026, roughly equivalent to Japan’s total energy consumption.

However, technology is already solving its own energy usage issues, with advances in AI and energy-efficient technologies helping to mitigate this impact. One excellent example is Brainchip’s Akida™ on-chip learning technology, which reduces reliance on cloud computing by enabling AI processing to occur locally, thereby lowering latency and energy consumption while enhancing security
 
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Tothemoon24

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IMG_9903.jpeg



Hi Everyone,
We're hiring for Design Verification position with below skills.
Qualifications:
1. B.Tech. with 6-8 years/ M.Tech. with 5-7 years of relevant experience.
2. Experience in verification of complex IPs/units and sub-systems.
3. Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies.
4. Knowledge in SystemVerilog or similar HVL.
5. Familiarity with verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug.
6. Experience with System Verilog Assertion (SVA) a plus.
7. Experience with Perl, Python or other scripting language is a plus
8. Experience with Industry Standard protocols like I2C/SPI/GPIO/AXI/APB/AHB is a plus.
9. Must have done atleast one project from scratch in SV/UVM.
 
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FiveBucks

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FiveBucks ..,Listen again at 1.20 mark

I hope those "couple of things" are HUGE ASS CONTRACTS!!!!!
 
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Diogenese

Top 20
View attachment 72499


Hi Everyone,
We're hiring for Design Verification position with below skills.
Qualifications:
1. B.Tech. with 6-8 years/ M.Tech. with 5-7 years of relevant experience.
2. Experience in verification of complex IPs/units and sub-systems.
3. Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies.
4. Knowledge in SystemVerilog or similar HVL.
5. Familiarity with verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug.
6. Experience with System Verilog Assertion (SVA) a plus.
7. Experience with Perl, Python or other scripting language is a plus
8. Experience with Industry Standard protocols like I2C/SPI/GPIO/AXI/APB/AHB is a plus.
9. Must have done atleast one project from scratch in SV/UVM.

"random stimulus" suggests an uncontrolled environment.

I wonder if it is a pointer for ADAS/AV, UAVs?

Of course there are many other applications which could be subject to random inputs, but ...

The ad is for a hardware verification engineer, so some new silicon is probably in the pipeline.

I assume that doesn't mean we will be going back to commerial chip-making, but we will be developing FPGAs and possibly "engineering samples" of the real hardware.

The job is apparently in India, where we do software, so will the software be tested on silicon designed by BRN in the US, or will it be tested on 3rd party CPUs/GPUs? As it is a hardware verification position, I'm betting on BRN hardware.

... but of course we have a newish algorithm product (TENNs/Akida simulation?), and TENNs is undergoing ongoing development and will run on 2rd party hardware.

... more questions than answers.

Do we know if this job is for a one-off time-limited contract or full time?
 
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Tothemoon24

Top 20
"random stimulus" suggests an uncontrolled environment.

I wonder if it is a pointer for ADAS/AV, UAVs?

Of course there are many other applications which could be subject to random inputs, but ...

The ad is for a hardware verification engineer, so some new silicon is probably in the pipeline.

I assume that doesn't mean we will be going back to commerial chip-making, but we will be developing FPGAs and possibly "engineering samples" of the real hardware.

The job is apparently in India, where we do software, so will the softwarel be tested on silicon designed by BRN in the US, or will it be tested on 3rd party CPUs/GPUs? As it is a hardwaew verification position, I'm betting on BRN hardware.

... but of course we have a newish algorithm product (TENNs/Akida simulation?), and TENNs is undergoing ongoing development and will run on 2rd party hardware.

... more questions than answers.

Do we know if this job is for a one-off time-limited contract or full time?
Hi Dio ,
Seems like this position is freshly advertised, hasn’t been listed on the brainchip website as yet


IMG_9904.jpeg
 
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View attachment 72499


Hi Everyone,
We're hiring for Design Verification position with below skills.
Qualifications:
1. B.Tech. with 6-8 years/ M.Tech. with 5-7 years of relevant experience.
2. Experience in verification of complex IPs/units and sub-systems.
3. Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies.
4. Knowledge in SystemVerilog or similar HVL.
5. Familiarity with verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug.
6. Experience with System Verilog Assertion (SVA) a plus.
7. Experience with Perl, Python or other scripting language is a plus
8. Experience with Industry Standard protocols like I2C/SPI/GPIO/AXI/APB/AHB is a plus.
9. Must have done atleast one project from scratch in SV/UVM.
Why has the poster asked people to reply to a gmail address rather than a Brainchip email address??
 
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Rach2512

Regular

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Rach2512

Regular
MB getting ready for their latest Town Hall meeting, with focus on MB.OS.

As we approach the end of an incredible year, it’s time for me to get ready for our latest “town hall“ meeting. This one focuses on MB.OS and I couldn’t be more excited! We’ll be gathering as a team to reflect on our major milestones, share updates, and set our sights on a strong finish for 2024.






Perhaps the strong 2024 finish ties in with what's to come in the next couple of months from Brainchip referring to Sean's remark on SDU video at the 1.20min mark, highlighted by @Smoothsailing.
 
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JoMo68

Regular
View attachment 72499


Hi Everyone,
We're hiring for Design Verification position with below skills.
Qualifications:
1. B.Tech. with 6-8 years/ M.Tech. with 5-7 years of relevant experience.
2. Experience in verification of complex IPs/units and sub-systems.
3. Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies.
4. Knowledge in SystemVerilog or similar HVL.
5. Familiarity with verification methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug.
6. Experience with System Verilog Assertion (SVA) a plus.
7. Experience with Perl, Python or other scripting language is a plus
8. Experience with Industry Standard protocols like I2C/SPI/GPIO/AXI/APB/AHB is a plus.
9. Must have done atleast one project from scratch in SV/UVM.
Sounds like a job for Chapman 🤔
 
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Diogenese

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Was watching the Sean video again and noticed something. I'm probs wrong or forgotten but I couldn't recall us doing a lot of focus on MPUs before, mostly MCU other than Microchip Technologys MPU at CES2024.

Sean specifically mentions MPU when discussing Pico, Akida IP & scalability. Whilst Pico obviously suited to the edge in things like a MCU I found it interesting it being discussed within a MPU or maybe I got the wrong context?

Wonder who maybe wants Pico in a MPU & for what end use product given the examples below.

IMG_20241107_220046.jpg


From a website discussing the differences in MPU v MCU.


An MPU is a more powerful and flexible processing unit compared to an MCU. Unlike an MCU, an MPU does not have memory and other parts built into the same chip. Instead, it relies on external components for memory (such as RAM and ROM) and other parts. This setup allows MPUs to offer greater processing power and flexibility, making them suitable for more complex and demanding applications.

The CPU within an MPU is typically more advanced, capable of handling multiple tasks and running operating systems such as Linux or Windows. This makes MPUs ideal for applications that require a lot of computational power, multitasking capabilities, and extensive software support. Examples include personal computers, smartphones, tablets, and high-end embedded systems.

Primary Differences​

FeatureMCUMPU
MemoryOn-chip Flash memoryExternal DRAM and NVM
Start-up TimeFastSlower due to external memory
Power SupplySingle voltage railMultiple voltage rails
Peripheral InterfacesLimited to integrated peripheralsExtensive external connectivity options
Use CasesEmbedded systems, real-time applicationsComplex OS-based applications, high data throughput
 
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Frangipani

Regular
Was watching the Sean video again and noticed something. I'm probs wrong or forgotten but I couldn't recall us doing a lot of focus on MPUs before, mostly MCU other than Microchip Technologys MPU at CES2024.

Sean specifically mentions MPU when discussing Pico, Akida IP & scalability. Whilst Pico obviously suited to the edge in things like a MCU I found it interesting it being discussed within a MPU or maybe I got the wrong context?

Wonder who maybe wants Pico in a MPU & for what end use product given the examples below.

View attachment 72525

From a website discussing the differences in MPU v MCU.


An MPU is a more powerful and flexible processing unit compared to an MCU. Unlike an MCU, an MPU does not have memory and other parts built into the same chip. Instead, it relies on external components for memory (such as RAM and ROM) and other parts. This setup allows MPUs to offer greater processing power and flexibility, making them suitable for more complex and demanding applications.

The CPU within an MPU is typically more advanced, capable of handling multiple tasks and running operating systems such as Linux or Windows. This makes MPUs ideal for applications that require a lot of computational power, multitasking capabilities, and extensive software support. Examples include personal computers, smartphones, tablets, and high-end embedded systems.

Primary Differences​

FeatureMCUMPU
MemoryOn-chip Flash memoryExternal DRAM and NVM
Start-up TimeFastSlower due to external memory
Power SupplySingle voltage railMultiple voltage rails
Peripheral InterfacesLimited to integrated peripheralsExtensive external connectivity options
Use CasesEmbedded systems, real-time applicationsComplex OS-based applications, high data throughput

Hi Fullmoonfever,

I assume Sean was saying (or meant to say) NPU rather than MPU (“One of the unique things about Akida, our IP that we offer for NPU, is the scalability part…”), which would make more sense in that context, but the automatic subtitles on YouTube didn’t get it quite right (which happens a lot).

Regards,
Frangipani
 
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Frangipani

Regular
But speaking of MPUs:

Frontgrade Gaisler’s collaboration with BrainChip, which was officially announced six months ago…



…has meanwhile got a name and its own webpage on the ESA website:

NEUROSPACE: PIONEERING NEUROMORPHIC AI ACCELERATION IN SPACE-GRADE MICROPROCESSORS​



95BA0381-8A39-43E9-B576-958E037FA16A.jpeg


5F12D867-9D2F-4737-ADE8-76BC2213EDC8.jpeg



“This exploration seeks not only to demonstrate the advantages of neuromorphic computing but also to lay the groundwork for a product that could be commercialized in the future.”
 
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