Interesting !!
1000 analog neurons!!!
... plus a digital spiking fabric
... plus a CNN accelerator????
Interesting !!
Hi Dio.1000 analog neurons!!!
... plus a digital spiking fabric
... plus a CNN accelerator????
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Hi Hoppy,Hi Dio.
How do you rate this as direct competition for our markets?
i.e. Are they cutting our lunch or just cutting the cheese?![]()
Hi Dio.Hi Hoppy,
Without the performance figures, it's hard to make a dir3ect comparison.
Pulsar sprang Phoenix-like from the ashes of analog SNN research, only they have not dusted off the dying embers.
It seems to me that the Innatera chip would involve more manufacturing steps, even a couple of different manufacturing processes? This would make the chip more expensive to make.
https://advanced.onlinelibrary.wiley.com/doi/10.1002/aelm.202500203
A problem with ReRAM is the performance varies from element to element, and this necessitates remedial processing/circuitry. This reduces the theoretical advantages of analog v digital.
This Innatera patent application illustrates the complications:
EP4548260A1 CALIBRATION OF SPIKING NEURAL NETWORKS 20220629
[0006] Analog and mixed signal circuits, typically fabricated as an integrated circuit, are a power-efficient way to implement SNNs. One drawback of analog signal processing circuits is that their performance can vary with manufacturing tolerances as well as environmental factors like temperature and supply voltage variations. Digitally assisted analog-mixed signal circuits can be used as an alternative to provide reliable performance. The amount of assistance needs to be bounded and optimized.
...
[0011] To perform such an improved calibration procedure, circuit parameters may be measured and subsequently adjusted to conform to predefined specifications. In complex analog and mixed signal networks it may not be practical to directly measure all relevant parameters with sufficient accuracy, necessitating a calibration strategy that makes optimal use of observable parameters to deduce values for non-observable parameters. Relevant circuit parameters should be made adjustable with sufficient range to overcome expected variability and sufficient resolution to achieve the predefined specifications. [0012] Due to the complexity of the SNN and the varied kind of components used in the design of an analog or mixed signal SNN system-on-a-chip (SoC), the optimal trade-off between performance versus the amount of calibration under the SoC constraints is a nontrivial problem. This invention provides a system and method for such calibration in an SNN with varied components, connectivity and limited observability and measurability.
... the SNN comprises a plurality of input processing circuits, each input processing circuit having an input for receiving a spiking neural network input signal and being configured to apply a transfer function to the input signal to generate a processed input signal;
a plurality of offset current generators, each offset current generator configured to generate an offset current signal at a predetermined level;
a plurality of synapses, each synapse connected to receive a processed input signal from one of the input processing circuits and configured to apply a predetermined weight to the processed input signal to generate a synapse output signal;
a plurality of neurons, each neuron connected to receive synapse output signals from a subset of the synapses and an offset current signal from one of the offset current generators, and each neuron configured to generate a neuron output signal in response to the received synapse output signals and offset current signal; and
an analog-to-digital converter having an input, the input being connectable to receive an offset current signal from one of the offset current generators, and being configured to convert the received offset current signal to a corresponding digital output signal.
They have to tweak each individual ReRAM circuit to bring its performance within spec.
The analog SNN (1k elements) might serve as an always on movement detector, or possibly KWS to wake up the rest of the chip processors. We have Pico to do this, and Akida is multifunctional and can serve this purpose with a few NPUs while leaving the rest of the NPUs free for other tasks.
Innatera bill Pulsar as "Pulsar: The first commercially available, brain-inspired microcontroller for sensing at the edge".
https://innatera.com/pulsar
Akida gets a fleeting mention in the context of neuromorphic chips in a newly published paper by researchers from the University of Pisa and ESA’s ESTEC (European Space Research and Technology Centre) titled “Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review”:
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Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review | Gabriela Mystkowska
🚀 Excited to share that my latest peer-reviewed article — "Hardware Platforms Enabling Edge AI for Space Applications: A Critical Review" — has just been published! 📝 In this work, we present a comprehensive state-of-the-art review of hardware architectures for AI on-the-edge in space missions...www.linkedin.com
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Disappointingly, Akida is only mentioned once in context with the Mercedes-Benz Vision EQXX concept car (p.10) but neither as an example of neuromorphic hardware supporting on-chip learning (p.10) nor in context with Frontgrade Gaisler’s NEUROSPACE project (which is part of OSIP, ESA’s Open Space Innovation Platform, p.11) nor in connection with ANT61 (p.11, here the co-authors also failed to follow up on the launched satellite’s fate).
By the way: If you thought “Edge AI for Space Applications” were more or less synonymous with “Neuromorphic Edge AI” - think again and have a closer look at the paper…
It does, however, end on a positive future outlook for neuromorphic computing in space applications:
“The emerging neuromorphic computing represents a promising approach for on-chip learning, which may help to increase the accuracy and shorten model development. Using SNNs might be essential in autonomous deep space missions which have very constrained telecommunication capabilities.
Hardware is not the only crucial part of AI success in space: the reliability of AI algorithms, model training, and other obstacles, which have not been mentioned in this article, have a great impact on the successful deployment of AI algorithms in space applications.”
I remember having seen Gabriela Mystkowska in a photo taken in the BrainChip private room at some trade fair. She was part of a group visiting BrainChip. I can't remember the other people, though. As far as I remember, the picture was marked as "our partners XX" and changed or deleted later, probably because of the mistake that she was not part of the partner group.
But maybe I am mistaken, maybe it was some other lady, though I immediately remembered her when I saw this photo.
US Space Force's new deep space radar tracks multiple satellites 22,000 miles away in key test | Space https://share.google/OMepwxScqnJUwa4tO
Hi @CHIPS,
I think you’re confusing Gabriela Mystkowska, who is a Polish PhD student at the University of Pisa’s Department of Information Engineering as well as a Visiting Researcher at ESA (which also happens to be the organisation that is co-funding her PhD), with Sylvia Traxler, who is a Senior Principal Software Engineer at Raytheon Technologies.
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Sylvia Traxler - Raytheon Technologies | LinkedIn
Experience: Raytheon Technologies · Education: The University of Texas at Austin · Location: Greater Tampa Bay Area · 455 connections on LinkedIn. View Sylvia Traxler’s profile on LinkedIn, a professional community of 1 billion members.www.linkedin.com
Sylvia Traxler was one of three RTX employees visiting the BrainChip private suite at the Venetian Tower during CES 2025. We know that to be a fact, since she and her colleagues Bryce Nakamori and Geoff Martin were featured in a group photo together with Steve Thorne and JP Wright, which was later posted by BrainChip on LinkedIn. However, that “Day 2: Productive Day at #CES2025” post publicly revealing RTX as a BRN partner vanished into thin air shortly after.
Some of us had long figured out that RTX were likely the subcontractor in question with regards to the AFRL SBIR contract that BRN had been awarded in December 2024, but apparently the negotiations were either not completely cut and dried or there were other reasons why this partnership was not yet supposed to go public. Anyway, IMO a very unprofessional slip-up to completely delete a publicly visible LinkedIn post without a comment. They could have just edited it instead.
Here are several 9 January 2025 posts by @Tothemoon24, @miaeffect, @Quiltman and @SERA2g, which prove that the LinkedIn post in question did exist for a short time - unfortunately, no one that day appears to have posted the actual picture showing the RTX trio…
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Company | Estimated Market Share | Technological Maturity | Key Strengths | Focus Areas |
---|---|---|---|---|
Intel | ~15–20% | Very High | Loihi chips, largest neuromorphic systems | Research & edge AI, robotics, autonomous vehicles |
BrainChip | ~10–12% | High | Akida processor, edge AI solutions | Consumer electronics, robotics, IoT |
SynSense | ~5% (niche) | Medium–High | Ultra-low-power SNN chips | Edge AI, robotics, drones, smart cameras |
IBM | ~15% | High (research focus) | TrueNorth chip, cognitive computing | Pattern recognition, AI research |
Qualcomm | ~5% (mobile edge) | Medium | Integration in Snapdragon SoCs | Mobile devices, IoT, edge AI |
Im guessing you’ve finished shorting for nowWhich company is a leader in neuromorphic computing that offers a market-ready chip or market-ready IP?
ChatGPT:
In short: BrainChip (Akida) and SynSense are currently the leaders, because they actually offer commercially available neuromorphic products.
- BrainChip – leader in licensable IP: Provides the neuromorphic Akida design as commercially licensable IP (and modules). They already have real licensing deals, e.g. with Frontgrade Gaisler for space applications. If you’re looking for “neuromorphic + market-ready + licensable IP,” BrainChip is the clear choice.
- SynSense – leader in market-ready chips: Sells production chips (Speck, Xylo) and dev kits for vision/audio. Speck is already in mass production, and the Xylo family is on the market with product pages and kits. If you need ready-to-use chips instead of IP, SynSense is at the forefront.
For context:
Bottom line:
- Intel (Loihi 2 / Hala Point) and IBM (TrueNorth) are important research platforms, but not available as market-ready, general commercial products or IP.
If you want licensable IP ⇒ go with BrainChip.
If you want off-the-shelf chips ⇒ go with SynSense.
Do you want me to also compare their ecosystems and developer support (SDKs, toolchains, partner network)? That could help you decide depending on whether you’re aiming for prototyping, product integration, or licensing.