"Single neural processing engineOK,
So they have used a single NPE (nee NPU).
https://brainchip.com/wp-content/uploads/2024/10/BC_Akida_Pico_Brochure.pdf
View attachment 70234
Minimal core for TENNS"
I had assumed that the Akida NN would need at least 2 NPEs, but TENNS can run in a single NPE???!!!!
That is truly astonishing.
... and it does not need a microprocessor????!!!!!
https://www.epdtonthenet.net/articl...ion-for-Resource-Constrained-Deployments.aspx
This IP relies on the Akida2 event-based computing platform configuration engine as its foundation, meaning that the data quantities needing to be dealt with are kept to a minimum. Consequently only a small logic die area is required (0.18mm x 0.18mm on a 22nm semiconductor process with 50kBytes of SRAM memory incorporated), plus the associated power budget remains low (with <1mW operation being comfortably achieved). It can serve as either a standalone device (without requiring a microcontroller) or alternatively become a co-processor.
It's a self-contained package that sets the benchmark for low power.