BRN Discussion Ongoing

[Earlyrelease]

Imagine you are a builder and you currently use bricks to build houses. You want to use a new material which is totally transformational but need to change your building processes and tradesmen skills. So you sign up for the new product and keep the supplier to a nda so your competition doesn’t sign up at the same time as you. That way if you do it right and the supplier retains the confidence you have in them to keep it quiet then you get a good 6-12mths head start on the rest of my competition. Now take out brick and insert Akida. Then think of first mover advantage. Whilst I would love to have some news what this delay actually means to me is that 2024/25 will see a rapid number of disclosures to market as based on the already great number of dot’s this crew have found and the prolific research papers showing the tech works. There are plenty in my mind looking at our product and their products and trying to work out what they need to do in their own backyard to make Akida blow their competition away in their field of excellence. I am a happy camper. Whilst I was hoping to have retired this year with my holding the year extra work just saved me spending some of the kids inheritance early.

 

[IloveLamp]

Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel

Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.

www.pcgamer.com

 

[Smoothsailing]

Now that’s very interesting

 

[Getupthere]

Qualcomm’s Boom Highlights AI Shift To The Edge — Forbes

In just six months, Qualcomm shares have gone from a 52-week low to an all-time high on the market’s realization that it has the components and technology to play in t...

apple.news

 

[Diogenese]

Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel

Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.

www.pcgamer.com

View attachment 64245

... and with an Akida 2 front end?

 

[Frangipani]

Hi Dodgy,

Radhard memory brings me to Numem. Wonder what happened with their phase 1 using Akida. Contract end date 25/01/23. So 12 months on. I have tried today, to get on their website and can't so either my phone or they haven't paid their bills. They put out new products a few month's ago that I wanted to check but can't get on their site. They also completed an A Funding round so should still be a going concern.

SC

How about Numem as our mystery customer for the highlighted Customer SoC?!

Ultra-low-power MRAM-based SoC for sensors/AI

Numem and IC’ALPS have designed an SoC with RISC-V processors, 2MBytes of NuRAM and a DSP/AI custom accelerator.

www.eenewseurope.com

Ultra-low-power MRAM-based SoC for sensors/AI​

Technology News | May 30, 2024
By Jean-Pierre Joosting
MRAM AI RISC-V DSP SOC

---

Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.​

The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.

The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.

“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.

“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.

Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.

www.numem.com
www.icalps.com

 

[Frangipani]

How about Numem as our mystery customer for the highlighted Customer SoC?!

View attachment 64246

Ultra-low-power MRAM-based SoC for sensors/AI

Numem and IC’ALPS have designed an SoC with RISC-V processors, 2MBytes of NuRAM and a DSP/AI custom accelerator.

www.eenewseurope.com

Ultra-low-power MRAM-based SoC for sensors/AI​

Technology News | May 30, 2024
By Jean-Pierre Joosting
MRAM AI RISC-V DSP SOC

---

Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.​

The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.

The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.

“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.

“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.

Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.

www.numem.com
www.icalps.com

I couldn’t find any info on the numem website, but found the press release on the IC’ALPS website

NUMEM & IC'Alps collaborate to develop an ultra-low-power SOC for Sensor and AI applications

IC'Alps and Numem announce their collaboration on an innovative high-performance low-power Memory subsystem.

www.icalps.com

as well as the following when you click on Do you want to know more on this SoC?
It appears the SoC is not fully digital, though - would that exclude Akida?

… analog-digital-asic-solutions/asic-case-studies/low-power-fast-risc-v-based-cpu-for-virtual-reality-device/

Low-power & fast RISC-V-based SoC for Virtual Reality Device

For a Virtual Reality Device, IC'Alps was to perform with the challenging task of a low-power and fast RISC-V CPU

www.icalps.com

Menu

Low-power & fast RISC-V-based SoC for Virtual Reality Device​

Application​

Embedding more and more intelligence directly into a Virtual Reality Device (VRD) is the major step that manufacturers are currently taking. Designing an ASIC is one of the safest way to go considering the challenging specifications of such integration: consumption, speed and miniaturization.

Customer request​

IC’Alps was responsible for the overall integration of all parts. Particularly, IC’Alps was tasked with the design and test services of a physical implementation of a RISC-V based chip in the advanced and challenging TSMC 16nm FinFET technology node, embedding a new class of resistive RAM.
Challenges

• High application requirements: high speed combined with low power
• MPW shuttle: tight deadline
• 4-partner project: n4 logistical, legal, management and scope of work challenges to address

Specific requirements

• From both Customer and Founder, work was to be done in a secure environment matching stringent requirements : isolated network, encrypted exchanges, dedicated server, CCTV …
• 9 RISC-V cores
• Die size: >15mm2
• Chip size: >6x6mm2
• Memory: 50%
• 15M eq Nand2 gates
• 4M instances

Our approach​

IC’Alps first performed a technology assessment with a first synthesis on a RTL code PULP platform. The aim was to make sure that the flow was properly set and get a first performance assessment in the targeted technology.

As a hierarchical integration was not possible due to planning constraints, IC’Alps then performed a flattened physical implementation of the chip starting from the RTL netlist delivered by the Front-End (FE) partner, using third-party IPs (Standard cells, IO, memories) and project partner RAM. A flattened floorplan meant project time optimization but at the cost of fewer outputs for which the team had to adjust.

After these first challenges were addressed, the team then moved on to synthesis, P&R, complete Sign-off verifications completing GDSII delivery and MPW scheduled shuttle

Finally, post-layout simulations were performed using FE partner test bench and test vectors for global power assessment before final delivery to the customer.

ASIC features​

RISC-V-based CPU​

TSMC 16FFC chip​

Fast and Low power ASIC​

 

[GStocks123]

Sony neuromorphic research intern- Using SNN’s for offline training & event based vision sensing.

Check out this job at Sony Europe:
https://www.linkedin.com/jobs/view/3937713126

 

[Frangipani]

Germany closed green! I’m scared

Actually, , für .


At least not on Tradegate, which is Germany’s most important stock exchange regarding BRN. Low volume on Friday, though.

Now that you’ve addressed your own Angst after mentioning “German angst” three times last month in the context of share price volatility, will you by any chance be covering “Australian angst” the next time BRN closes red on the ASX?

 

[MrNick]

NaNose has been added to the Google AI Startup Fund. And we all know who has links to them…

 

[Fullmoonfever]

Wonder if we get a look in or have had any input here at all?

This paper has just been released and whilst there is no mention of us and the work benefited from some input from Dr's at Numenta (they work with CPUs) after a guest lecture at CMU, there has been some history with Akida and cortical column work at CMU with John Shen et al as per a prev post of mine below for reference.

From memory I think @Diogenese or someone mentioned PVDM had looked at or studied or started on similar but could be mistaken.

Submitted on 20 May 2024]

NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors​

[2405.11844] NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors

CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)

A technical paper titled “NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors” was published by researchers at Carnegie Mellon University. Abstract: “Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient...

semiengineering.com

Some info in the previous post on C3S cortical columns.

BRN Discussion Ongoing

Maybe stay out of it? I wasn't responding to that comment. If you want others to "stay out of it".... then don't have a spat on a public forum about nonsense. Especially since none of this is relevant to BRN.

thestockexchange.com.au

Sri Lakshmi Vemulapalli​

Research Assistant at Neuromorphic Computer Architecture Lab | ECE Graduate Student at Carnegie Mellon University | Seeking full time positions starting immediately.​

Carnegie Mellon UniversityCarnegie Mellon University​

Carnegie Mellon University​

1 year 1 month

• Teaching Assistant​

  Jan 2023 - May 20235 months
  Pittsburgh, Pennsylvania, United States
  Working as a Teaching Assistant for 18698 - Neural Signal Processing.

• Research Assistant​

  Aug 2022 - May 202310 months
  Pittsburgh, Pennsylvania, United States
  Working as a Research Assistant under Prof. John Shen on a Neural Processor, “Akida” by Brainchip.
  - Developing a C3S designs in MetaTF and map to Akida chip.
  - Developing a technique for the conversion of CNNs to Spiking Neural Networks (SNN) and designing a framework for Native TNNs.

 

[JDelekto]

Nvidia's suspected 2025 processor is now rumoured to be built by Intel using off-the-peg Arm cores. Yes, an Nvidia chip built by Intel

Feels kinda weird Intel's foundry ambitions could help bring about the demise of the x86 chip.

www.pcgamer.com

View attachment 64245

From the information I read, I believe this chip will be built using Intel's Foundry Services. Tom's Hardware reported in January this year that Nvidia had chosen Intel to produce H100 GPUs. This is similar to how BrainChip partnered with Intel Foundry Services to be able to manufacture chips with BrainChip's IP, as an alternative to using TSMC.

I think it can get confusing because Intel not only does chip design but will now fabricate chips for themselves and others. The article mentioned in that post mentions using both Intel's Foundry services, potentially as an alternative to using TSMC.

 

[Justchilln]

How about Numem as our mystery customer for the highlighted Customer SoC?!

View attachment 64246

Ultra-low-power MRAM-based SoC for sensors/AI

Numem and IC’ALPS have designed an SoC with RISC-V processors, 2MBytes of NuRAM and a DSP/AI custom accelerator.

www.eenewseurope.com

Ultra-low-power MRAM-based SoC for sensors/AI​

Technology News | May 30, 2024
By Jean-Pierre Joosting
MRAM AI RISC-V DSP SOC

---

Numem, a leader in high-performance memory IP cores and memory chips/chiplets based on its patented NuRAM (MRAM) and SmartMem technologies, and IC’ALPS, a leader in ASIC/SoC design and supply chain management, have pooled their expertise to meet the challenge of developing an ambitious integrated circuit with RISC-V processors, 2MBytes of NuRAM and a DSP/AI Custom Datapath Accelerator.​

The Custom SoC was developed in an advanced technology node. This SoC has been designed and implemented to highlight the Numem high-performance, low power memory subsystem with a RISC V Processor and AI Accelerator for ultra-low power applications. It has been developed through a close collaboration between Numem and IC’ALPS.

The physical implementation of this integrated circuit was made in a secure space (isolated location, network, and servers, and encrypted exchanges) to meet with the stringent protection of sensitive data required by this program.

“We were pleased with the collaboration and quality of service provided by IC’ALPS which made this on-time tape out possible and first time functional silicon” said Jack Guedj, CEO of Numem. “NuRAM with SmartMem is a high-performance memory subsystem which is 2-3x smaller and boast significant power reduction over SRAM”, he added.

“The challenges were numerous including — architecture, power domains, protection of the sensitive data, run times pushing improvement of EDA flow and the pressure of the tape out deadline”.

Numem and IC’Alps intend to extend their partnership to serve new SoC projects for customers.

www.numem.com
www.icalps.com

I think it’s going to be megachips, when we signed the license they said in the future they might start to make some of their own chips…….

 

[IloveLamp]

MSN

Google Tensor G5 could debut on Pixel 10 — and it could be the first real Google-made chip

Tensor G5 could be a big leap forward for Google's chips

www.tomsguide.com

 

[itsol4605]

NaNose has been added to the Google AI Startup Fund. And we all know who has links to them…

As we all know:
No Brainchip Akida inside NaNose products

 

[IloveLamp]

As we all know:
No Brainchip Akida inside NaNose products

 

[Smoothsailing]

As we all know:
No Brainchip Akida inside NaNose products

Dribble Dribble Dribble Dribble
Ignore time

 

[wilzy123]

As we all know:
No Brainchip Akida inside NaNose products

You lost me at "No Brain"

 

[Pom down under]

As we all know:
No Brainchip Akida inside NaNose products

 

[Bravo]

Chinese Academy of Sciences + Synsense




Chinese scientists unveil low-power neuromorphic ‘brain-like’ chips
By GT staff reporters

Published: Jun 02, 2024 06:53 PM

An employee inspects a cellphone chip at an electronic product research and development company in Ningbo, East China's Zhejiang Province on February 22, 2024. The company's products are exported to more than 80 countries in Europe and Latin America, and its overseas order book is full through the second quarter of 2024. Photo: VCG
A Chinese scientific team has developed a new 'brain-like' chip that operates on reduced energy consumption, marking a significant advance in China's chip manufacturing technology.

Researchers from the Chinese Academy of Sciences, in collaboration with other scholars, have developed Speck, a low-power neuromorphic chip capable of dynamic computing. This system-level chip, integrating algorithm, software, and hardware design, demonstrates the inherent advantages of 'brain-like' computation in incorporating high-level brain mechanisms. The study was recently published online in the international journal 'Nature'.

"The human brain is an incredibly complex neural network, consuming only 20 watts, far less than current AI systems," said Li Guoqi, a researcher at the Institute of Automation, Chinese Academy of Sciences reported by Xinhua.

He emphasized that as computational demands and energy consumption rise, mimicking the neurons and synapses of the human brain to develop new intelligent computing systems is a promising direction.

Human brains can dynamically allocate attention based on stimulus, a process known as the attention mechanism. This research proposes 'neuromorphic dynamic computing,' applying this principle to enhance neuromorphic chip designs, thereby unlocking greater performance and energy efficiency.

Speck combines a dynamic visual sensor and a neuromorphic chip on one chip, achieving remarkably low power use at rest. It can handle visual tasks with just 0.7 milliwatts, providing an energy-efficient, responsive, and low-power solution for AI applications, according to Li.

"The development of the neuromorphic chip concept is both a breakthrough in existing technology and a strategic response to US pressures, marking our pursuit of alternative development paths," Ma Jihua, a veteran telecom industry observer, told the Global Times on Sunday.

"China is leading the market in the brain-inspired chip sector," Ma told the Global Times, "Although this approach has been studied for a long time, transitioning from mathematical theory to mass manufacturing is challenging and requires extensive work," he added.

This kind of chip may help address fundamental challenges across the chip manufacturing industry, which is currently facing a bottleneck. The concept of neuromorphic computing presents a promising and viable research direction, according to Ma.

Chinese scientists unveil low-power neuromorphic ‘brain-like’ chips - Global Times

www.globaltimes.cn

Spike-based dynamic computing with asynchronous sensing-computing neuromorphic chip - PubMed

By mimicking the neurons and synapses of the human brain and employing spiking neural networks on neuromorphic chips, neuromorphic computing offers a promising energy-efficient machine intelligence. How to borrow high-level brain dynamic mechanisms to help neuromorphic computing achieve energy...

pubmed.ncbi.nlm.nih.gov