BrainChip + BHTech

uiux

Regular

Implementing Neural Network Algorithms on Neuromorphic Processors

Description:

TECHNOLOGY AREA(S): Air Platform

OBJECTIVE: Deploy Deep Neural Network algorithms on near-commercially available Neuromorphic or equivalent Spiking Neural Network processing hardware.

DESCRIPTION: Biological inspired Neural Networks provide the basis for modern signal processing and classification algorithms. Implementation of these algorithms on conventional computing hardware requires significant compromises in efficiency and latency due to fundamental design differences. A new class of hardware is emerging that more closely resembles the biological Neuron/Synapse model found in Nature and may solve some of these limitations and bottlenecks. Recent work has demonstrated significant performance gains using these new hardware architectures and have shown equivalence to converge on a solution with the same accuracy [Ref 1].The most promising of the new class are based on Spiking Neural Networks (SNN) and analog Processing in Memory (PiM), where information is spatially and temporally encoded onto the network. A simple spiking network can reproduce the complex behavior found in the Neural Cortex with significant reduction in complexity and power requirements [Ref 2]. Fundamentally, there should be no difference between algorithms based on Neural Network and current processing hardware. In fact, the algorithms can easily be transferred between hardware architectures [Ref 4]. The performance gains, application of neural networks and the relative ease of transitioning current algorithms over to the new hardware motivates the consideration of this topic.Hardware based on Spiking Neural Networks (SNN) are currently under development at various stages of maturity. Two prominent examples are the IBM True North and the INTEL Loihi Chips, respectively. The IBM approach uses conventional CMOS technology and the INTEL approach uses a less mature memrisistor architecture. Estimated efficiency performance increase is greater than 3 orders of magnitude better than state of the art Graphic Processing Unit (GPUs) or Field-programmable gate array (FPGAs). More advanced architectures based on an all-optical or photonic based SNN show even more promise. Nano-Photonic based systems are estimated to achieve 6 orders of magnitude increase in efficiency and computational density; approaching the performance of a Human Neural Cortex. The primary goal of this effort is to deploy Deep Neural Network algorithms on near-commercially available Neuromorphic or equivalent Spiking Neural Network processing hardware. Benchmark the performance gains and validate the suitability to warfighter application.Work produced in Phase II may become classified. Note: The prospective contractor(s) must be U.S. owned and operated with no foreign influence as defined by DoD 5220.22-M, National Industrial Security Program Operating Manual, unless acceptable mitigating procedures can and have been implemented and approved by the Defense Counterintelligence and Security Agency (DCSA). The selected contractor and/or subcontractor must be able to acquire and maintain a secret level facility and Personnel Security Clearances. This will allow contractor personnel to perform on advanced phases of this project as set forth by DCSA and NAVAIR in order to gain access to classified information pertaining to the national defense of the United States and its allies; this will be an inherent requirement. The selected company will be required to safeguard classified material IAW DoD 5220.22-M during the advanced phases of this contract.

PHASE I:
Develop an approach for deploying Neural Network algorithms and identify suitable hardware, learning algorithm framework and benchmark testing and validation methodology plan. Demonstrate performance enhancements and integration of technology as described in the description above. The Phase I effort will include plans to be developed under Phase II.

PHASE II:
Transfer government furnished algorithms and training data running on a desktop computing environment to the new hardware environment. An example algorithm development frame for this work would be TensorFlow. Some modification of the framework and/or algorithms may be required to facilitate transfer. Some optimization will be required and is expected to maximize the performance of the algorithms on the new hardware. This optimization should focus on throughput, latency, and power draw/dissipation. Benchmark testing should be conducted against these metrics. Develop a transition plan for Phase III.It is probable that the work under this effort will be classified under Phase II (see Description section for details).

PHASE III:
Optimize algorithm and conduct benchmark testing. Adjust algorithms as needed and transition to final hardware environment. Successful technology development could benefit industries that conduct data mining and high-end processing, computer modeling and machine learning such as manufacturing, automotive, and aerospace industries.

KEYWORDS: Neural Networks, Neuromorphic, Processor, Algorithm, Spiking Neurons, Machine Learning

References:

1. Ambrogio, S., Narayanan, P., Tsai, H., Shelby, R., Boybat, I., Nolfo, C., . . . Burr, G. “Equivalent-Accuracy Accelerated Neural-Network Training Using Analogue Memory.” Nature, June 6, 2018, pp. 60-67. https://www.nature.com/articles/s41586-018-0180-5

2. Izhikevich, E. “Simple Model of Spiking Neurons.” IEEE Transactions on Neural Networks, 2003, pp. 1569-1572. https://ieeexplore.ieee.org/document/1257420

3. Diehl, P., Zarrella, G., Cassidy, A., Pedroni, B. & Neftci, E. “Conversion of Artificial Recurrent Neural Networks to Spiking Neural Networks for Low-Power Neuromorphic Hardware.” Cornell University, 2016. https://arxiv.org/abs/1601.04187

4. Esser, S., Merolla, P., Arthur, J., Cassidy, A., Appuswamy, R., Andreopoulos, A., . . . Modha, D. “Convolutional Networks for Fast, Energy-Efficient Neuromorphic Computing.” IBM Research: Almaden, May 24, 2016. https://arxiv.org/pdf/1603.08270.pdf

5. Department of Defense. National Defense Strategy 2018. United States Congress. https://dod.defense.gov/Portals/1/Documents/pubs/2018-National-Defense-Strategy-Summary.pdf


---



BHTech wins Phase II SBIR Award for Implementing Neural Network Algorithms on Neuromorphic Processors

The generation of real-time insights for the warfighter is an increasingly important area of interest, especially due to the growth of Electronic Warfare challenges. These insights require faster processors and smarter models that can be deployed at the edge in low Size, Weight and Power (SWaP) configurations. Traditional von-Neumann based computing architectures are challenged by the complex learning models, low power budget and real-time needs of the warfighter. To mitigate this limitation, BHTech has proposed to the United States Navy an implementation strategy using neuromorphic processors to accommodate modern SWaP and performance requirements of the warfighter.

sam_image2-600x318.png


Bascom Hunter Technologies has recently been awarded a Phase 2 Navy SBIR award for BHTech’s proposal on implementing neural network algorithms on neuromorphic processors.

During phase 1, BHTech has demonstrated in the superior performance of photonic based neurons within Continuous Neuromorphic Computing architectures for both electronic and hybrid-photonic hardware. In Phase 2, we will extend that work to create designs for a Neuromorphic Toolbox of solutions providing Electronic, Spiking Electronic and Hybrid Photonic hardware for Neural Network topologies. The Phase 2 Option will develop these designs into benchtop prototypes. The Phase 2 Option will also include the development of a VPX Neuromorphic Hardware that is HOST compatible. In Phase 3 we will be looking at optimizing solutions for the Navy and creating deployable Neuromorphic Hardware. This will be based on the Neuromorphic Hardware Toolbox that was started in Phase 2 as well as the development of BASE (Bascom Hunter’s AI Software Environment), which will aid the rapid migration of machine learning algorithms from Desktop Computing Systems to Edge Computing modules.

Neuromorphic Processors provide a realistic solution to obtaining real-time insights for the warfighter by leveraging an architecture that more closely resembles the Human Brain and are better suited to run Neural Network models. Our toolbox approach allows the best hardware architectures to be matched with the best software solutions, enabling the rapid conversion of cutting-edge technology into ruggedized, modular hardware. Our Hardware and Software Toolboxes will bring immediate benefits to warfighters in the Navy and beyond by extracting actionable insights in real-time at the edge (eliminating the latency problem when processing in the cloud). One application is the real-time identification of Radio Frequency (RF) emitters using Neuromorphic processors operating via trained Neural Networks.


Originally discovered by @Quatrojos ..
 
  • Like
  • Fire
  • Love
Reactions: 43 users
D

Deleted member 118

Guest
Last edited by a moderator:
  • Like
Reactions: 2 users

Neuromorphia

fact collector
Bear with me while I join some dots.

Q. So how is this information relevant to this Brainchip + BHTech thread?
A. At first glance Bascom Hunter (BH Tech) is an IT solutions company. However on 16-Jan-2020 they acquired Xcelaero.
So Xcelaero is owned by Bascom Hunter (BH Tech)...(Parent company)


Xcelaero Published the news release below with the image of Akida Brainchip

Xcelaero General Information

Description

Developer of air handling systems designed to optimize energy efficiency. The company's air handling systems are designed to reduce the energy requirement for operating modern thermal management systems, enabling people to utilize it for a broad range of applications in electronics cooling, industrial and defense applications.

Xcelaero2.JPG

One thing Xcelaero designs is custom ducted electric propulsor fans for UAV's

Xcelaero.JPG







So when you add the bold text...
Xcelaero is a defence contractor that designs electric propulsor fans for electric and hybrid powered aircraft like UAV's, among many other things.

And then you add...
The generation of real-time insights for the warfighter is an increasingly important area of interest, especially due to the growth of Electronic Warfare challenges. These insights require faster processors and smarter models that can be deployed at the edge in low Size, Weight and Power (SWaP) configurations. Traditional von-Neumann based computing architectures are challenged by the complex learning models, low power budget and real-time needs of the warfighter. To mitigate this limitation, BHTech has proposed to the United States Navy an implementation strategy using neuromorphic processors to accommodate modern SWaP and performance requirements of the warfighter.

sam_image2-600x318.png


Bascom Hunter Technologies has recently been awarded a Phase 2 Navy SBIR award for BHTech’s proposal on implementing neural network algorithms on neuromorphic processors. During phase 1, BHTech has demonstrated in the superior performance of photonic based neurons within Continuous Neuromorphic Computing architectures for both electronic and hybrid-photonic hardware. In Phase 2, we will extend that work to create designs for a Neuromorphic Toolbox of solutions providing Electronic, Spiking Electronic and Hybrid Photonic hardware for Neural Network topologies. The Phase 2 Option will develop these designs into benchtop prototypes. The Phase 2 Option will also include the development of a VPX Neuromorphic Hardware that is HOST compatible. In Phase 3 we will be looking at optimizing solutions for the Navy and creating deployable Neuromorphic Hardware. This will be based on the Neuromorphic Hardware Toolbox that was started in Phase 2 as well as the development of BASE (Bascom Hunter’s AI Software Environment), which will aid the rapid migration of machine learning algorithms from Desktop Computing Systems to Edge Computing modules.

Neuromorphic Processors provide a realistic solution to obtaining real-time insights for the warfighter by leveraging an architecture that more closely resembles the Human Brain and are better suited to run Neural Network models. Our toolbox approach allows the best hardware architectures to be matched with the best software solutions, enabling the rapid conversion of cutting-edge technology into ruggedized, modular hardware. Our Hardware and Software Toolboxes will bring immediate benefits to warfighters in the Navy and beyond by extracting actionable insights in real-time at the edge (eliminating the latency problem when processing in the cloud). One application is the real-time identification of Radio Frequency (RF) emitters using Neuromorphic processors operating via trained Neural Networks.

And then add VPX Neuromorphic Hardware component
VPX
defined by Wikipedia https://en.wikipedia.org/wiki/VPX#:~:text=VPX, also known as VITA,a new high speed connector.
VPX computer bus standard - V -VME and P -PCI and X the extents for both buses standards.[citation needed]
The VMEbus International Trade Association (VITA) working group, formed in March 2003, was composed of companies such as ADLINK, Boeing, Curtiss-Wright, Elma Electronic, GE Intelligent Platforms, Kontron, Mercury Computer Systems, and Northrop Grumman, it was designed with defense applications in mind...

then add this artificial intelligence platform with VPX for remotely piloted aircraft...
vpx.JPG



So if you have added up all those items:

Low Size, Weight and Power (SWaP)
Custom ducted electric propulsor fans for UAV's
Proposed to the United States Navy an implementation strategy using neuromorphic processors to accommodate modern SWaP and performance requirements of the warfighter.
Bring immediate benefits to warfighters in the Navy and beyond by extracting actionable insights in real-time at the edge
Real-time identification of Radio Frequency (RF) emitters using Neuromorphic processors
Artificial intelligence platform with VPX for remotely piloted aircraft
plus the image of Brainchip Akida


Then it could equal navy autonomous drones of some sort.
All speculation of course.
 
Last edited:
  • Like
  • Fire
  • Love
Reactions: 45 users

Neuromorphia

fact collector
Q. So how is this information relevant to this Brainchip + BHTech thread?

A. I posted only to point out the US Navy has a similar program to the US Air Force, paid with a separate Budget...
also shows the neuromorphic chips that have preceded Brainchip... and it describes the aims of the US Navy.


DEPARTMENT OF THE NAVY (DON) 20.2 Small Business Innovation Research (SBIR) Proposal Submission Instructions

from 2020... Some highlights of doc...key words Neuromorphic... Spiking Neural Networks (SNN)... and Voice Recognition



N202-099 Implementing Neural Network Algorithms on Neuromorphic Processors

N202-108 Modeling Neuromorphic and Advanced Computing Architectures

OBJECTIVE: Develop radar and/or electronic warfare (EW) processing technology to include Synthetic Aperture Radar (SAR) and/or Airborne Electronic Attack (AEA) processing systems for coherent pulsed radio frequency (RF) systems to include new generation non-sinusoidal time-frequency RF waveforms such as wavelets. DESCRIPTION: A need exists for hardware and software SAR and AEA processing solutions to augment or replace existing airborne processing technology at reduced size, weight, and power (SWaP), and waste heat versus the current state-of-the-art. Current generation commercial digital processor technology recently delivered to the U.S. Navy to perform SAR processing is 0.73 Teraflop, or 1 Trillion Floating Point Operations per Second (TFLOPS) per pound (lb.). This includes 2xCPU’s/4xGPU’s, power supply, cooling system, 256 GB random access memory (RAM), 3.2 TB Serial Advanced Technology Attachment (SATA) disk, motherboard, and interface elements. Development of processing hardware and software system technology may be digital, optical, hybrid optoelectronic, or of neuromorphic computing capability in order to reduce the SWaP, and waste heat versus existing real-time processing solutions.

N202-099 TITLE: Implementing Neural Network Algorithms on Neuromorphic Processors RT&L FOCUS AREA(S): Artificial Intelligence/ Machine Learning, General Warfighting Requirements (GWR) TECHNOLOGY AREA(S): Air Platform OBJECTIVE: Deploy Deep Neural Network algorithms on near-commercially available Neuromorphic or equivalent Spiking Neural Network processing hardware.

The most promising of the new class are based on Spiking Neural Networks (SNN) and analog Processing in Memory (PiM) where information is spatially and temporally encoded onto the network. It can be shown that a simple spiking network can reproduce the complex behavior found in the neural cortex with significant reduction in complexity and power requirements [Ref 2]. Fundamentally, there should be no difference in algorithms based on neural networks. In fact, they can easily be transferred between hardware architectures [Ref 4]. Performance gains and the relative ease of transitioning current algorithms over to the new hardware motivates consideration of this SBIR topic.

Hardware based on Spiking Neural Networks (SNN) are currently under development at various stages of maturity. Two prominent examples are the IBM True North and the INTEL Loihi Chips, respectively. The IBM approach uses conventional CMOS technology and the INTEL approach uses a less mature memrisistor architecture. Estimated efficiency performance increase is greater than 3 orders of magnitude better than state of the art Graphic Processing Unit (GPUs) or Field-programmable gate array (FPGAs). More advanced architectures based on an all-optical or photonic based SNN show even more promise. Nano-Photonic based systems are estimated to achieve 6 orders of magnitude increase in efficiency and computational density; approaching the performance of a Human Neural Cortex. The primary goal of this effort is to deploy Deep Neural Network algorithms on near-commercially available Neuromorphic or equivalent Spiking Neural Network processing hardware. Benchmark the performance gains and validate the suitability to warfighter application

The primary goal of this effort is to create a software tool that captures the non-linear physics of these SNNs, and possibly other neuromorphic and related low-SWaP architectures, as well as functionally model their behavior. It is recommended to use open source languages, software, and hardware when possible. A similar approach [Ref 6] should be considered as a starting point, with the ultimate goal of producing a viable and flexible product for capturing, modeling, and understanding the behaviors of a composite system constructed to employ these adaptive learning systems, including all systems ranging from CMOS to photonics. Additionally, the model should be able to take an algorithm developed on a conventional neural network framework like Caffe, PyTorch, TensorFlow, etc. and run it through the functional model to predict performance criteria like latency and throughput. The secondary goal is to build up a network framework to model multi-step processing chains. For example, a hypothetical processing chain for a communications system might be filter, in-phase quadrature (IQ) demodulation, frequency decomposition, symbol detection, interference mitigation, filter, and decryption.

N202-098 TITLE: Voice Recognition to Support Assessment of Cross Platform Situational Awareness and Decision Making RT&L FOCUS AREA(S): General Warfighting Requirements (GWR) TECHNOLOGY AREA(S): Air Platform, Battlespace, Human Systems OBJECTIVE: Develop a voice recognition capability that can support analysis and debrief of Carrier Strike Group level decision making and Situational Awareness (SA). DESCRIPTION: There is a need for complex, highly coordinated, System-of-Systems, Air Defense missions and tactics cross-platform communications. The complexity of coordination associated with integrated tactics necessitates a significant amount of voice communications across the different platforms to provide SA and elicit decision-making. Communication is critical to cross platform coordination and overall tactic execution, yet it remains one of the most challenging training objectives to meet during Air Defense events. Specifically, there are challenges with recognizing when a call or request for communication has been made (i.e., at a specific point in the timeline), ensuring timeliness of communications (i.e., time to respond to a request or provide required information based on environmental cue), and providing the appropriate brevity terms and standard communications protocols. The need for timely, diagnostic feedback specific to cross-platform communications becomes critical. Current practice for assessing communications and overall performance relies solely on qualitative instructor assessments in large part due to the need to understand what is being said, and the context of the situation it is being said in. Challenges are associated with human error, manpower, and time resources required to meet training demands. In addition, debriefs can take thirty to ninety minutes to prepare, which can create potential loss of learning points. Consequently, the need for reliable (i.e., consistently, accurately captures what was said), timely (i.e., data can be synthesized and used for debrief within thirty minutes or less) and diagnostic feedback (i.e., data provided allows instructors to correlate voice communication with tactical execution to provide relevant feedback based on environmental context) for voice communication that can be standardized across platforms is important. A proof-ofconcept to demonstrate the ability to create logs and a plan for prototype development and implementation and evolve into a demonstrable capability integrated into the Next Generation Threat System’s (NGTS) Analysis and Reporting Tool (ART). In order to integrate with ART, a voice tool would have to provide a parse-able “utterance log” in a compatible format (e.g., json, xml, hdf5) that

1689938932009.png
 
Last edited:
  • Like
  • Love
  • Thinking
Reactions: 17 users
F

Filobeddo

Guest
Bear with me while I join some dots.

Q. So how is this information relevant to this Brainchip + BHTech thread?
A. At first glance Bascom Hunter (BH Tech) is an IT solutions company. However on 16-Jan-2020 they acquired Xcelaero.
So Xcelaero is owned by Bascom Hunter (BH Tech)...(Parent company)


Xcelaero Published the news release below with the image of Akida Brainchip

Xcelaero General Information

Description

Developer of air handling systems designed to optimize energy efficiency. The company's air handling systems are designed to reduce the energy requirement for operating modern thermal management systems, enabling people to utilize it for a broad range of applications in electronics cooling, industrial and defense applications.

View attachment 3565
One thing Xcelaero designs is custom ducted electric propulsor fans for UAV's

View attachment 3566






So when you add the bold text...
Xcelaero is a defence contractor that designs electric propulsor fans for electric and hybrid powered aircraft like UAV's, among many other things.

And then you add...
The generation of real-time insights for the warfighter is an increasingly important area of interest, especially due to the growth of Electronic Warfare challenges. These insights require faster processors and smarter models that can be deployed at the edge in low Size, Weight and Power (SWaP) configurations. Traditional von-Neumann based computing architectures are challenged by the complex learning models, low power budget and real-time needs of the warfighter. To mitigate this limitation, BHTech has proposed to the United States Navy an implementation strategy using neuromorphic processors to accommodate modern SWaP and performance requirements of the warfighter.

sam_image2-600x318.png


Bascom Hunter Technologies has recently been awarded a Phase 2 Navy SBIR award for BHTech’s proposal on implementing neural network algorithms on neuromorphic processors. During phase 1, BHTech has demonstrated in the superior performance of photonic based neurons within Continuous Neuromorphic Computing architectures for both electronic and hybrid-photonic hardware. In Phase 2, we will extend that work to create designs for a Neuromorphic Toolbox of solutions providing Electronic, Spiking Electronic and Hybrid Photonic hardware for Neural Network topologies. The Phase 2 Option will develop these designs into benchtop prototypes. The Phase 2 Option will also include the development of a VPX Neuromorphic Hardware that is HOST compatible. In Phase 3 we will be looking at optimizing solutions for the Navy and creating deployable Neuromorphic Hardware. This will be based on the Neuromorphic Hardware Toolbox that was started in Phase 2 as well as the development of BASE (Bascom Hunter’s AI Software Environment), which will aid the rapid migration of machine learning algorithms from Desktop Computing Systems to Edge Computing modules.

Neuromorphic Processors provide a realistic solution to obtaining real-time insights for the warfighter by leveraging an architecture that more closely resembles the Human Brain and are better suited to run Neural Network models. Our toolbox approach allows the best hardware architectures to be matched with the best software solutions, enabling the rapid conversion of cutting-edge technology into ruggedized, modular hardware. Our Hardware and Software Toolboxes will bring immediate benefits to warfighters in the Navy and beyond by extracting actionable insights in real-time at the edge (eliminating the latency problem when processing in the cloud). One application is the real-time identification of Radio Frequency (RF) emitters using Neuromorphic processors operating via trained Neural Networks.

And then add VPX Neuromorphic Hardware component
VPX
defined by Wikipedia https://en.wikipedia.org/wiki/VPX#:~:text=VPX, also known as VITA,a new high speed connector.
VPX computer bus standard - V -VME and P -PCI and X the extents for both buses standards.[citation needed]
The VMEbus International Trade Association (VITA) working group, formed in March 2003, was composed of companies such as ADLINK, Boeing, Curtiss-Wright, Elma Electronic, GE Intelligent Platforms, Kontron, Mercury Computer Systems, and Northrop Grumman, it was designed with defense applications in mind...

then add this artificial intelligence platform with VPX for remotely piloted aircraft...
View attachment 3569


So if you have added up all those items:

Low Size, Weight and Power (SWaP)
Custom ducted electric propulsor fans for UAV's
Proposed to the United States Navy an implementation strategy using neuromorphic processors to accommodate modern SWaP and performance requirements of the warfighter.
Bring immediate benefits to warfighters in the Navy and beyond by extracting actionable insights in real-time at the edge
Real-time identification of Radio Frequency (RF) emitters using Neuromorphic processors
Artificial intelligence platform with VPX for remotely piloted aircraft
plus the image of Brainchip Akida


Then it could equal navy autonomous drones of some sort.
All speculation of course.

Great work @Neuromorphia keep them coming
 
  • Like
  • Love
  • Fire
Reactions: 8 users

Quatrojos

Regular

...The BH Tech division of Bascom Hunter has three product lines: RF Systems, Neuromorphic Processors and Photonics. The RF Systems product line develops Satellite Communication products and SATCOM Test hardware. The Neuromorphic Processor product line develops Spiking Neural Networks, Photonic Neural Networks and Photonic Processors, ML at the Edge and support software for the edge hardware. The Photonics product line develops microwave photonic filters and cancellers, RF photonic processors and photonic integrated circuits for a variety of applications.

As a key member of our team, you will execute, as well as assist in growing opportunities with government organizations, perform on Research & Development (R&D) efforts, and transition technology to commercialization.
 
  • Like
  • Fire
Reactions: 11 users
D

Deleted member 118

Guest
I wonder if we will get a brn update regarding we are working with Bascom Hunter


Photonic AI Processor (PHASOR)​

Award Information
Agency:Department of Defense
Branch:Strategic Capabilities Office
Contract:HQ003422C0114
Agency Tracking Number:SCO2D-0088
Amount:$1,499,916.08
Phase:phase II
Program:SBIR
Solicitation Topic Code:SCO213-003
Solicitation Number:21.3
Timeline
Solicitation Year:2021
Award Year:2022
Award Start Date (Proposal Award Date):2022-09-30
Award End Date (Contract End Date):2024-09-29
Small Business Information
BASCOM HUNTER TECHNOLOGIES INC
5501 Bascom Way
Baton Rouge, LA 70809-3507
United States
DUNS:964413657
HUBZone Owned:No
Woman Owned:No
Socially and Economically Disadvantaged:No
Principal Investigator
Name: Samuel Subbarao
Phone: (225) 283-2158
Email: subbarao@bascomhunter.com
Business Contact
Name: Stacey McCarthy
Phone: (269) 271-6966
Email: mccarthy@bascomhunter.com
Research Institution
N/A
Abstract
Bascom Hunter proposes a Photonic AI Processor (PHASOR) to deliver automatic target recognition (ATR) at a rate of 75,000 frames per second (FPS) using 4k resolution images. PHASOR will deliver these results in a 1U form factor using a combination of Neuromorphic Processors in the form of FPGAs and Photonic Integrated Circuits (PICs). In previous work, Bascom Hunter, partnering with Princeton University, demonstrated the performance of Matrix Vectro Multiplication (MVM) using PICs. We were able to implement 2x10 photonic arrays. The microring resonator (MRR)-based design was able to achieve a matrix loading speed of 2 Gbps, an input vector loading speed of 24 Gbps and an energy consumption per multiply and accumulate (MAC) operation of 1 pJ/bit. With a 2x2 matrix, we have shown computational performance of 0.16 Terra Operations Per Second (TOPS) and a latency of 200 ps. The latency of 200 ps can be compared to Tensor Processing Unit (TPU) latency of 10 ms. In Phase II, we will be laying the groundwork for the PHASOR product. We will be utilizing the previously designed 2x10 photonic MVM to create a CNN for MNIST classification. Our proposed design can implement a 4x4 MVM kernel (utilizing two 2x10 PICs) with a modulated laser input at 10 GSps (Vector update speed) and an MRR update at 1 GSps (Matrix update speed). We expect the 4x4 kernel in Phase II to provide 150k FPS for the MNIST dataset when using a stride of 1.
 
Last edited by a moderator:
  • Thinking
  • Like
Reactions: 3 users
D

Deleted member 118

Guest
  • Like
  • Fire
Reactions: 4 users
Top Bottom