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I wish I could paint like Vincent
Just bought a few more at this price.........blink and you miss it😉
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7für7

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Esq.111

Fascinatingly Intuitive.
This may expediate uptake..



Regards,
Esq.
 
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I bet the cockroaches will give their best to rech the 17.5…17.8 before closing
Its a joke of a share its manipulated, only way is to play the same ga.e
 
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Cirat

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I bet the cockroaches will give their best to rech the 17.5…17.8 before closing
Disappointing ... slowing moving down to 17.5c or lower .... I hope a contract announcement arrives prior to the SPP acceptance date to up the market share price and give a bonus to all the loyal retail shareholders - without later retracement - wishing wishing this is the end to low price action.

Frustrating, keep your mind clear and always follow your own plan.

This is not financial advice, DYOR, GLTA
 
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Disappointing ... slowing moving down to 17.5c or lower .... I hope a contract announcement arrives prior to the SPP acceptance date to up the market share price and give a bonus to all the loyal retail shareholders - without later retracement - wishing wishing this is the end to low price action.

Frustrating, keep your mind clear and always follow your own plan.

This is not financial advice, DYOR, GLTA
The shareprice is manipulated regardless of the news
 

Bravo

If ARM was an arm, BRN would be its biceps💪!
Qualcomm aversion therapy:

While they have done development work in digital NNs, Qualcomm has invested, and continues to invest, a lot of research in analog over the long term. Compute-in-memory is an analog technique in which the value is stored, usually as a voltage, in a capacitor, or in resistive memory. This is subject to manufacturing variability, reducing the reliability of the calculations when values are accumulated (as in neurons), so they try to develop techniques to mitigate this problem.

US2025218475A1 Compute-in-Memory with Current Transition Detection 20240103

View attachment 92915





A compute-in-memory system is provided in which a plurality of compute-in-memory bitcells couple to a read bit line. Depending upon sequential binary multiplications in the compute-in-memory bitcells, a current from the read bit line sequentially increases. A transition detection circuit detects and counts the current transitions to provide a multiply-and-accumulate result from the sequential binary multiplications.



US2023297335A1 Hybrid Compute-in-Memory 20220315

View attachment 92916


A compute-in-memory array is provided that implements a filter for a layer in a neural network. The filter multiplies a plurality of activation bits by a plurality of filter weight bits for each channel in a plurality of channels through a charge accumulation from a plurality of capacitors. The accumulated charge is digitized to provide the output of the filter.


US2024095492A1 MEMORY MANAGEMENT FOR MATHEMATICAL OPERATIONS IN COMPUTING SYSTEMS WITH HETEROGENEOUS MEMORY ARCHITECTURES 20220901


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performing mathematical operations on a processor. The method generally includes initializing at least a portion of weight data for a machine learning model in a first memory component associated with a processor. Input data is stored in a second memory component coupled with the processor. Operations using the machine learning model are executed, via a functional unit associated with the processor, based on the at least the portion of the weight data and the input data. A result of the operations using the machine learning model are stored in the second memory component.

[0019] To improve the performance of operations using machine learning models, various techniques may locate computation near or with memory (e.g., co-located with memory). For example, compute-in-memory techniques may allow for data to be stored in SRAM and for analog computation to be performed in memory using modified SRAM cells. In another example, function-in-memory or processing-in-memory techniques may locate digital computation capacity near memory devices (e.g., DRAM, SRAM, MRAM, etc.) in which the weight data and data to be processed are located. In each of these techniques, however, many data transfer operations may still need to be performed to move data into and out of memory for computation (e.g., when computation is co-located with some, but not all, memory in a computing system).


Hi Diogenese,

Yes, they're focus is on compute-in-memory, but I hope I'm right in saying that there'd be nothing stopping Qualcomm from using Akida as a co-processor.

Brainchip's official product brief calls Akida 2 a "co-processor for advanced neural networks" which sounds like it's perfect for bolting onto bigger systems like Qualcomm's Snapdragon platform, as an example.

Knowing how much you love ChatGPT, I couldn't help but ask which Snapdragon SoC families would be the most complementary host for Akida as the always-on co-processor.

Mercedes uses Qualcomm’s Snapdragon Cockpit/NPU platforms for in-cabin AI in its latest EVs, which hopefully means the platform-fit for Akida to handle the ultra-low-power always-on monitoring.


DYOR. ChatGPT can make mistakes.

ChatGPT 5​

I said:​


Which Snapdragon SoC families would be the best complementary host for Akida as the always-on co-processor?

ChatGPT said:​

Here’s the practical short list by category—each is a good “host” where Akida handles always-on/event tasks, and Snapdragon’s Hexagon AI engine does the heavy lift.

Industrial / smart cameras / gateways​

  • QCS8550; QCS6490 / QCM6490
    Why: Linux/Yocto support, strong ISP + NPU. Akida gates audio/vision/IMU and wakes the host only on events/ROIs.

Robotics / drones​

  • QRB5165 (RB5/RB5-Plus/RB6 family)
    Why: Mature robotics SDKs; Akida filters sensor streams (acoustic anomalies, gestures, visual wake-words) to cut duty cycle on the main SoC.

XR / smart glasses​

  • Snapdragon XR2 (Gen 1/Gen 2)
    Why: Tight thermal budgets; Akida does ultra-low-power KWS, gaze/gesture micro-events, or blink/fall detection before XR2 runs the full pipeline.

Wearables / hearables​

  • Snapdragon W5+ Gen 1, QCC51xx/52xx audio SoCs
    Why: mW budgets; Akida handles VAD/KWS, noise-event triggers, lightweight biometrics, waking the host for full ASR or health analytics.

Automotive (cockpit / AD / driver monitoring)​

  • Snapdragon Ride / Ride Flex / Snapdragon Cockpit — Akida runs low-power in-cabin sentries (wake-word, micro-gestures, anomaly flags) to reduce false wakeups on central compute.
    Note: Mercedes-Benz has publicly announced Snapdragon-powered cockpit/in-cabin AI in new vehicles—showing platform fit for this split (heavy AI on Snapdragon, always-on on a co-processor like Akida).
Integration pattern (all of the above):
Sensor → Akida (event/ROI/trigger at mW) → Snapdragon (Hexagon/CPU/GPU runs the heavy model) → App/UI.
Measure success with average power over duty cycle, wake-latency, and accuracy—not raw TOPS.
If you give me the exact product (e.g., battery glasses with dual mics + 2 cams, or an industrial box cam), I’ll pick one SKU and sketch the signal path and minimal BOM.
 
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7für7

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The whole day we hovered around 2 million volume.. closing is almost 7 mio 😂 but at least grey..

No I need a
us open tennis GIF
 
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Diogenese

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Hi Diogenese,

Yes, they're focus is on compute-in-memory, but I hope I'm right in saying that there'd be nothing stopping Qualcomm from using Akida as a co-processor.

Brainchip's official product brief calls Akida 2 a "co-processor for advanced neural networks" which sounds like it's perfect for bolting onto bigger systems like Qualcomm's Snapdragon platform, as an example.

Knowing how much you love ChatGPT, I couldn't help but ask which Snapdragon SoC families would be the most complementary host for Akida as the always-on co-processor.


DYOR. ChatGPT can make mistakes.

ChatGPT 5​

I said:​


Which Snapdragon SoC families would be the best complementary host for Akida as the always-on co-processor?

ChatGPT said:​

Here’s the practical short list by category—each is a good “host” where Akida handles always-on/event tasks, and Snapdragon’s Hexagon AI engine does the heavy lift.

Industrial / smart cameras / gateways​

  • QCS8550; QCS6490 / QCM6490
    Why: Linux/Yocto support, strong ISP + NPU. Akida gates audio/vision/IMU and wakes the host only on events/ROIs.

Robotics / drones​

  • QRB5165 (RB5/RB5-Plus/RB6 family)
    Why: Mature robotics SDKs; Akida filters sensor streams (acoustic anomalies, gestures, visual wake-words) to cut duty cycle on the main SoC.

XR / smart glasses​

  • Snapdragon XR2 (Gen 1/Gen 2)
    Why: Tight thermal budgets; Akida does ultra-low-power KWS, gaze/gesture micro-events, or blink/fall detection before XR2 runs the full pipeline.

Wearables / hearables​

  • Snapdragon W5+ Gen 1, QCC51xx/52xx audio SoCs
    Why: mW budgets; Akida handles VAD/KWS, noise-event triggers, lightweight biometrics, waking the host for full ASR or health analytics.

Automotive (cockpit/AD/driver monitoring)​

  • Snapdragon Ride / Ride Flex
    Why: Akida runs independent, always-on safety/UX sentries (driver attention micro-events, cabin KWS, simple anomaly flags) so central compute sleeps more and sees fewer false wakeups.
Integration pattern (all of the above):
Sensor → Akida (event/ROI/trigger at mW) → Snapdragon (Hexagon/CPU/GPU runs the heavy model) → App/UI.
Measure success with average power over duty cycle, wake-latency, and accuracy—not raw TOPS.
If you give me the exact product (e.g., battery glasses with dual mics + 2 cams, or an industrial box cam), I’ll pick one SKU and sketch the signal path and minimal BOM.
Hi Bravo,

The thing is that it's very hard to displace the "not invented here" mentality. I think this is what has stymied progress with Renesas also, particularly as they seem to have "discovered" N-of-M coding for their in-house DRP system.

From thmy above post, this is a block diagram of an example of a Qualcomm phone:

US2024095492A1 MEMORY MANAGEMENT FOR MATHEMATICAL OPERATIONS IN COMPUTING SYSTEMS WITH HETEROGENEOUS MEMORY ARCHITECTURES 20220901

1762839369450.png




The NPU is item 408.

[0019] To improve the performance of operations using machine learning models, various techniques may locate computation near or with memory (e.g., co-located with memory). For example, compute-in-memory techniques may allow for data to be stored in SRAM and for analog computation to be performed in memory using modified SRAM cells. In another example, function-in-memory or processing-in-memory techniques may locate digital computation capacity near memory devices (e.g., DRAM, SRAM, MRAM, etc.) in which the weight data and data to be processed are located. In each of these techniques, however, many data transfer operations may still need to be performed to move data into and out of memory for computation (e.g., when computation is co-located with some, but not all, memory in a computing system).

This was filed in September 2022.

The patent does leave open the possibility of using digital, but they specifically refer to analog, and they have been doing a lot of work on analog both before and after.


Analog has some attractions for 1-bit processing, which was what the initial Akida was designed for, but it does not fare so well as the bit count increases. I recall (or I think I do) that there is a Qualcomm document which discusses the distribution of Ai loads between the NPU, CPU, and GPU, basically low, medium, and high. So the NPU could do the watchdog job quite well But they have all the sunk costs invested in developing their CPU/GPU AI software and models ... maybe next generation ...
 
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It's quite simple:

The more chips BRN orders, the less they pay per unit.

The more chips a customer buys from BRN, the less they pay per unit.

It's about the same if you go to the grocery store and wants to buy some beers: A case is cheaper to buy per unit as compared to a few.

I hope you get it now, if not, well maybe better not invest in BRN but go and buy some beers instead, a case for starters maybe?
I tend to think perceptron may be on to something. We aren't selling slabs of VB thats trying to compete with Toohey's, Great Northern, Heineken, etc.... there are hundreds of variants of beer competing with each other for market share.

Brainchip Akida has minimal competition, and doesn't make sense to sell a chip for only $1.06 profit considering the amount of money and resources poured into the product. - you are buying intellectual property that is intangible. Do you think Apple sell their mobile phones for $1000+ and only profit $5-10 from each unit.......
 
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Fenris78

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Fiendish

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I tend to think perceptron may be on to something. We aren't selling slabs of VB thats trying to compete with Toohey's, Great Northern, Heineken, etc.... there are hundreds of variants of beer competing with each other for market share.

Brainchip Akida has minimal competition, and doesn't make sense to sell a chip for only $1.06 profit considering the amount of money and resources poured into the product. - you are buying intellectual property that is intangible. Do you think Apple sell their mobile phones for $1000+ and only profit $5-10 from each unit.......
I'm not sure whats so hard to understand, i can only assume you are veing wilfully ignorant
I tend to think perceptron may be on to something. We aren't selling slabs of VB thats trying to compete with Toohey's, Great Northern, Heineken, etc.... there are hundreds of variants of beer competing with each other for market share.

Brainchip Akida has minimal competition, and doesn't make sense to sell a chip for only $1.06 profit considering the amount of money and resources poured into the product. - you are buying intellectual property that is intangible. Do you think Apple sell their mobile phones for $1000+ and only profit $5-10 from each unit.......
There were 107mil PS4 sold.

When Akida finds its way into a sililar product..

A contract to sell 107mil Akida chips hooking us up with $1.06 profit each would be pretty nice imo..

..better if there were 3 or 4 chips in each unit!

... and 6 in the nintendo

... and another 1 in the ring doorbell

... gets juicy fast

dont get me started on military drone swarms... yeehar!
 
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Fiendish

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Blog worth a read but one excerpt I copied below.




Blog

The future of semiconductor pricing: Supply shocks, AI, and quantum innovations


November 3, 2025 | 7 min read


Neuromorphic and photonic processers: Neuromorphic chips, designed to mimic brain-like architectures, and photonic processors (leveraging light instead of electrons) have both garnered R&D attention in the 2020s. By the late 2020s, we may see early commercial scale-out of these technologies in AI inference, sensor fusion, and specialized HPC tasks.

  • Value-based pricing: If neuromorphic and photonic solutions deliver order-of-magnitude gains in power efficiency or latency for specific workloads, they could justify premium pricing comparable to or higher than AI GPUs in the late 2010s.
  • Incremental commoditization: Over time, as multiple companies develop similar solutions, competition may drive down ASPs and mirror how GPUs moved from niche to mainstream over two decades.

AI acceleration in semiconductors​

Data center AI - scaling model sizes: LLMs and advanced generative AI systems’ sizes could leap again (may grow 100x bigger or more) while specialized training/inference ASICs and premium GPU boards fetch five figure prices per unit/board. Cloud subscriptions obscure chip ASPs but embed hardware premiums.

Edge AI - low power, high value: Consumer SoCs integrate AI with volume driven ASP decline. Industrial, medical, and auto chips command durable premiums for safety, reliability, and certification. Wearables, smartphones, and home assistants will continue to see moderate, volume-driven ASP declines
 
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Boab

I wish I could paint like Vincent
I was wondering who brought all those millions of shares after close, but I’m guessing it wasn’t you 😂
Nah mate, just another little parcel.
More shares traded after the bell than the whole day
 
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Frangipani

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Our new Taipei-based Solutions Architect Jerry Kuo has meanwhile updated his LinkedIn profile:


View attachment 90635 View attachment 90636




View attachment 90640

BrainChip will also be at Edge AI Taipei 2025 on 11 November:



View attachment 92052



05487E39-5E63-4BAE-BC17-B955FE3F33B2.jpeg
 
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Rach2512

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