Interesting read:
In March 2026, thirty researchers from UIUC, Stanford, UCLA, NVIDIA, Google, IBM, and other institutions published a single vision paper under the leadership of Deming Chen at UIUC.
damnang2.substack.com
"In March 2026, thirty researchers from UIUC, Stanford, UCLA, NVIDIA, Google, IBM, and other institutions published a single vision paper under the leadership of Deming Chen at UIUC. The title: “AI+HW 2035: Shaping the Next Decade.” It covers how AI and hardware need to co-evolve over the next ten years. This is not a paper reporting experimental results. It reads more like a consensus declaration from industry and academia on where things need to go."
"If the majority of inference demand by 2035 comes from the edge and the physical world, the center of gravity in the semiconductor market shifts.
The paper’s “Accelerator Architecture” layer lists domain-specific accelerators (tensor cores, NPUs, IPUs), low-precision and sparse architectures, reconfigurable architectures (FPGAs, CGRAs), and heterogeneous architectures (CPU plus GPU plus TPU plus NPU combinations) as core technologies. Its “System and Infrastructure” layer explicitly names “edge and on-device AI platforms (tiny AI).”
Small, low-power, high-efficiency AI processors become a market on par with large data center GPUs. ARM-based NPUs, RISC-V-based custom processors, and neuromorphic chips will all compete for this space."
"The message is clear. The era of “bigger and more” is giving way to the era of “more efficient and more tightly integrated.” Understanding this transition is what makes the next decade of the semiconductor industry legible."
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